[PATCH 3/6] gas: aarch64: ginsn: add safeguards for reg-based stack pointer update

[Indu Bhagat]

On 6/5/25 3:51 AM, Alice Carlotti wrote:
>> diff --git a/gas/config/tc-aarch64-ginsn.c b/gas/config/tc-aarch64-ginsn.c
>> index 0dce2a71bd9..4eab74afc5d 100644
>> --- a/gas/config/tc-aarch64-ginsn.c
>> +++ b/gas/config/tc-aarch64-ginsn.c
>> @@ -26,6 +26,37 @@
>>   
>>   /* Invalid DWARF register number.  Used when WZR / XZR is seen.  */
>>   #define GINSN_DW2_REGNUM_INVALID  (~0U)
>> +/* The maximum DWARF register number for any integer register.  */
>> +#define AARCH64_MAX_INT_DWARF_REG  REG_SP
>> +
>> +/* Structure for additional book-keeping for code patterns where reg-based
>> +   REG_SP update is done, e.g.,
>> +       (A) mov r16, 4128
>> +       (B) add sp, sp, r16
>> +   This is informally referred to as SPLIT_SP_UPDATE code pattern in the
>> +   implementation.  Such book-keeping is necessary to ensure all
>> +   write-after-write dependencies on x16, atleast between (A) and (B) are
>> +   reflected in generated ginsns.  In other words, this means:
>> +     - correctly whitelist: an instruction otherwise deemed uninteresting for
>> +     SCFI purposes, now should be considered necessary (because it writes to
>> +     x16)
>> +     - correctly create: add appropriate ginsns to convey the WAW dependence.
>> +   The above two items are somewhat correlated but verbosity here helps
>> +   underline that such book-keeping is necessary to ensure SCFI
>> +   correctness.  */
>> +
>> +struct split_sp_update
>> +{
>> +  /* Whether a mov imm op to a reg has been seen.  */
>> +  bool mov_p;
> This boolean seems unnecessary - it looks like it just indicates whether
> movreg_mask is nonzero, but we can just test movreg_mask directly.

(Forgot to reply to this one in my ealier response.)

Yes. Will remove it.