[PATCH v4 2/5] AArch64, Arm and TIC6x tests: fix typo in linker scripts
Richard Earnshaw (lists)
Richard.Earnshaw@arm.com
Mon Jun 9 15:55:47 GMT 2025
On 22/05/2025 15:35, Matthieu Longo wrote:
> The linker scripts for AArch64 and TIC6x were probably originally copied from
> Arm testsuite, and contain the same typo in the name of the attributes section.
>
> This patch fixes the typo across all the testsuites.
> ---
> ld/testsuite/ld-aarch64/aarch64.ld | 2 +-
> ld/testsuite/ld-aarch64/protections/bti-plt.ld | 2 +-
> ld/testsuite/ld-aarch64/relocs-ilp32.ld | 2 +-
> ld/testsuite/ld-aarch64/relocs.ld | 2 +-
> ld/testsuite/ld-aarch64/variant_pcs.ld | 2 +-
> ld/testsuite/ld-arm/arm.ld | 2 +-
> ld/testsuite/ld-arm/arm_purecode.ld | 2 +-
> ld/testsuite/ld-arm/discard-unwind.ld | 2 +-
> ld/testsuite/ld-arm/script-type.ld | 4 ++--
> ld/testsuite/ld-tic6x/discard-unwind.ld | 2 +-
> ld/testsuite/ld-tic6x/unwind.ld | 2 +-
> 11 files changed, 12 insertions(+), 12 deletions(-)
OK, I think this one counts as obvious.
R.
>
> diff --git a/ld/testsuite/ld-aarch64/aarch64.ld b/ld/testsuite/ld-aarch64/aarch64.ld
> index 75ee3b58934..4676cd41f1c 100644
> --- a/ld/testsuite/ld-aarch64/aarch64.ld
> +++ b/ld/testsuite/ld-aarch64/aarch64.ld
> @@ -15,5 +15,5 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attributes 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-aarch64/protections/bti-plt.ld b/ld/testsuite/ld-aarch64/protections/bti-plt.ld
> index 8682623d69b..cab42091869 100644
> --- a/ld/testsuite/ld-aarch64/protections/bti-plt.ld
> +++ b/ld/testsuite/ld-aarch64/protections/bti-plt.ld
> @@ -10,5 +10,5 @@ SECTIONS
> .text : { *(.text) }
> . = 0x28000;
> .got : { *(.got) *(.got.plt) }
> - .ARM.attributes 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-aarch64/relocs-ilp32.ld b/ld/testsuite/ld-aarch64/relocs-ilp32.ld
> index 4ddba914120..3958ad8b533 100644
> --- a/ld/testsuite/ld-aarch64/relocs-ilp32.ld
> +++ b/ld/testsuite/ld-aarch64/relocs-ilp32.ld
> @@ -15,7 +15,7 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attributes 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> /* Providing a .data section triggers a non-executable segment to be
> generated, which gives somewhere else for the linker to put the TLS
> segment without creating a RWX permissioned one. */
> diff --git a/ld/testsuite/ld-aarch64/relocs.ld b/ld/testsuite/ld-aarch64/relocs.ld
> index 77adac8b46e..b0e75e0e29a 100644
> --- a/ld/testsuite/ld-aarch64/relocs.ld
> +++ b/ld/testsuite/ld-aarch64/relocs.ld
> @@ -15,7 +15,7 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attributes 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> /* Providing a .data section triggers a non-executable segment to be
> generated, which gives somewhere else for the linker to put the TLS
> segment without creating a RWX permissioned one. */
> diff --git a/ld/testsuite/ld-aarch64/variant_pcs.ld b/ld/testsuite/ld-aarch64/variant_pcs.ld
> index a66a9343a77..0f515324814 100644
> --- a/ld/testsuite/ld-aarch64/variant_pcs.ld
> +++ b/ld/testsuite/ld-aarch64/variant_pcs.ld
> @@ -19,5 +19,5 @@ SECTIONS
> .rela.plt : { *(.rela.plt) *(.rela.iplt) }
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attributes 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-arm/arm.ld b/ld/testsuite/ld-arm/arm.ld
> index 8e3fac28463..4b596ce9ce9 100644
> --- a/ld/testsuite/ld-arm/arm.ld
> +++ b/ld/testsuite/ld-arm/arm.ld
> @@ -19,5 +19,5 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attribues 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-arm/arm_purecode.ld b/ld/testsuite/ld-arm/arm_purecode.ld
> index 195aca1be93..488e3dda2d7 100644
> --- a/ld/testsuite/ld-arm/arm_purecode.ld
> +++ b/ld/testsuite/ld-arm/arm_purecode.ld
> @@ -28,5 +28,5 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .ARM.attribues 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-arm/discard-unwind.ld b/ld/testsuite/ld-arm/discard-unwind.ld
> index d8f6524aa9f..54418f71870 100644
> --- a/ld/testsuite/ld-arm/discard-unwind.ld
> +++ b/ld/testsuite/ld-arm/discard-unwind.ld
> @@ -15,5 +15,5 @@ SECTIONS
> *(.v4_bx)
> } =0
> /DISCARD/ : { *(.ARM.exidx*) }
> - .ARM.attribues 0 : { *(.ARM.atttributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-arm/script-type.ld b/ld/testsuite/ld-arm/script-type.ld
> index 01995eb07eb..af346976cd1 100644
> --- a/ld/testsuite/ld-arm/script-type.ld
> +++ b/ld/testsuite/ld-arm/script-type.ld
> @@ -3,7 +3,7 @@ SECTIONS {
> foo_a = bar_a;
> foo_t = bar_t;
> foo_o = bar_o;
> - *(.text)
> + *(.text)
> }
> - .ARM.attribues 0 : { *(.ARM.attributes) }
> + .ARM.attributes 0 : { *(.ARM.attributes) }
> }
> diff --git a/ld/testsuite/ld-tic6x/discard-unwind.ld b/ld/testsuite/ld-tic6x/discard-unwind.ld
> index 00582c1e7b7..172e2a8bc05 100644
> --- a/ld/testsuite/ld-tic6x/discard-unwind.ld
> +++ b/ld/testsuite/ld-tic6x/discard-unwind.ld
> @@ -11,5 +11,5 @@ SECTIONS
> *(.c6xabi.extab*)
> } =0
> /DISCARD/ : { *(.c6xabi.exidx*) }
> - .c6xabi.attribues 0 : { *(.c6xabi.atttributes) }
> + .c6xabi.attributes 0 : { *(.c6xabi.attributes) }
> }
> diff --git a/ld/testsuite/ld-tic6x/unwind.ld b/ld/testsuite/ld-tic6x/unwind.ld
> index a4f87229f49..01ba9b6f72d 100644
> --- a/ld/testsuite/ld-tic6x/unwind.ld
> +++ b/ld/testsuite/ld-tic6x/unwind.ld
> @@ -16,5 +16,5 @@ SECTIONS
> .got : { *(.got) *(.got.plt)}
> . = 0x12340000;
> .far : { *(.far) }
> - .c6xabi.attribues 0 : { *(.c6xabi.atttributes) }
> + .c6xabi.attributes 0 : { *(.c6xabi.attributes) }
> }
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