[PATCH 1/1] aarch64: Add system registers for MPAM extension

Alice Carlotti alice.carlotti@arm.com
Thu Jun 5 16:10:39 GMT 2025 

On Mon, Jun 02, 2025 at 11:37:12AM +0100, Yury Khrustalev wrote:
> This patch adds support for new system registers introduced in the
> Armv8.8-A MPAM extension (Memory Partitioning and Monitoring):
> 
> Available in Armv9.3-A (v8.8-A):
>   MPAMBW0_EL1, MPAMBW1_EL1, MPAMBW1_EL12, MPAMBW2_EL2, MPAMBW3_EL3,
>   MPAMBWCAP_EL2, MPAMBWIDR_EL1
> 
> Available in Armv9.3-A (v8.8-A) with SME:
>   MPAMBWSM_EL1

The new registers all require FEAT_MPAM_PE_BW_CTRL, which is only available
from Armv9.3, so references to Armv8.8 should be dropped and the implementation
should use V9_3A instead of V8_8A.

It would also be more accurate to describe the patch as supporting "2024 MPAM
extensions" instead of "MPAM extension", since the new specification adds
several extensions to the preexisting MPAM features.

> 
> The details can be found in [1].
> 
> [1]: https://developer.arm.com/documentation/ddi0601/latest
> ---
>  .../gas/aarch64/sysreg/armv8_8-a-sme-sysregs.d     | 10 ++++++++++
>  .../gas/aarch64/sysreg/armv8_8-a-sme-sysregs.s     |  3 +++
>  .../gas/aarch64/sysreg/armv8_8-a-sysregs.d         | 14 ++++++++++++++
>  .../gas/aarch64/sysreg/armv8_8-a-sysregs.s         | 14 ++++++++++++++
>  gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.d   |  3 +++
>  gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.l   |  4 ++++
>  gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.s   |  6 ++++++
>  opcodes/aarch64-opc.h                              |  2 +-
>  opcodes/aarch64-sys-regs.def                       |  8 ++++++++
>  9 files changed, 63 insertions(+), 1 deletion(-)
>  create mode 100644 gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.d
>  create mode 100644 gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.s
>  create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.d
>  create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.l
>  create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.s
> 
> diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.d
> new file mode 100644
> index 00000000000..cfc680cbb22
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.d
> @@ -0,0 +1,10 @@
> +#as: -march=armv8.8-a+sme
> +#objdump: -dr
> +
> +.*:     file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <.*>:
> +.*:	d538a5e0 	mrs	x0, mpambwsm_el1
> +.*:	d518a5e0 	msr	mpambwsm_el1, x0
> diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.s
> new file mode 100644
> index 00000000000..d7947f5965d
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sme-sysregs.s
> @@ -0,0 +1,3 @@
> +
> +	mrs	x0, mpambwsm_el1
> +	msr	mpambwsm_el1, x0
> diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d
> index 294fed2c061..72ad6145d25 100644
> --- a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d
> +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d
> @@ -17,3 +17,17 @@ Disassembly of section \.text:
>  [^:]+:\s+d501411f 	msr	allint, #0x1
>  [^:]+:\s+d501421f 	msr	s0_1_c4_c2_0, xzr
>  [^:]+:\s+d538c9a0 	mrs	x0, icc_nmiar1_el1
> +
> +[^:]+:\s+d538a5a0 	mrs	x0, mpambw0_el1
> +[^:]+:\s+d518a5a0 	msr	mpambw0_el1, x0
> +[^:]+:\s+d538a580 	mrs	x0, mpambw1_el1
> +[^:]+:\s+d518a580 	msr	mpambw1_el1, x0
> +[^:]+:\s+d53da580 	mrs	x0, mpambw1_el12
> +[^:]+:\s+d51da580 	msr	mpambw1_el12, x0
> +[^:]+:\s+d53ca580 	mrs	x0, mpambw2_el2
> +[^:]+:\s+d51ca580 	msr	mpambw2_el2, x0
> +[^:]+:\s+d53ea580 	mrs	x0, mpambw3_el3
> +[^:]+:\s+d51ea580 	msr	mpambw3_el3, x0
> +[^:]+:\s+d53ca5c0 	mrs	x0, mpambwcap_el2
> +[^:]+:\s+d51ca5c0 	msr	mpambwcap_el2, x0
> +[^:]+:\s+d538a4a0 	mrs	x0, mpambwidr_el1
> diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s
> index dd43ad8b506..5e6236f1b19 100644
> --- a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s
> +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s
> @@ -10,3 +10,17 @@
>  	.inst	0xd501421f
>  
>  	mrs	x0, icc_nmiar1_el1
> +
> +	mrs	x0, mpambw0_el1
> +	msr	mpambw0_el1, x0
> +	mrs	x0, mpambw1_el1
> +	msr	mpambw1_el1, x0
> +	mrs	x0, mpambw1_el12
> +	msr	mpambw1_el12, x0
> +	mrs	x0, mpambw2_el2
> +	msr	mpambw2_el2, x0
> +	mrs	x0, mpambw3_el3
> +	msr	mpambw3_el3, x0
> +	mrs	x0, mpambwcap_el2
> +	msr	mpambwcap_el2, x0
> +	mrs	x0, mpambwidr_el1
> diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.d b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.d
> new file mode 100644
> index 00000000000..1a8929100ff
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.d
> @@ -0,0 +1,3 @@
> +#as: -march=armv8.8-a
> +#source: mpam-v8.8-bad.s
> +#error_output: mpam-v8.8-bad.l
> diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.l b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.l
> new file mode 100644
> index 00000000000..34e919790a4
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.l
> @@ -0,0 +1,4 @@
> +.*: Assembler messages:
> +.*: Warning: specified register cannot be written to at operand 1 -- `msr mpambwidr_el1,x0'
> +.*: Error: selected processor does not support system register name 'mpambwsm_el1'
> +.*: Error: selected processor does not support system register name 'mpambwsm_el1'
> diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.s b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.s
> new file mode 100644
> index 00000000000..2a0f94fefbc
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/sysreg/mpam-v8.8-bad.s
> @@ -0,0 +1,6 @@
> +/* This is read-only register */
> +msr mpambwidr_el1, x0
> +
> +/* This register is not available without +sme flag */
> +mrs x0, mpambwsm_el1
> +msr mpambwsm_el1, x0
> diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
> index 9ab9bdf5123..2b49d2a8139 100644
> --- a/opcodes/aarch64-opc.h
> +++ b/opcodes/aarch64-opc.h
> @@ -326,7 +326,7 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
>  #define F_REG_ALIAS	(1 << 6)  /* Register name aliases another.  */
>  
>  #undef F_REG_128
> -#define F_REG_128	(1 << 7) /* System regsister implementable as 128-bit wide.  */
> +#define F_REG_128	(1 << 7) /* System register implementable as 128-bit wide.  */

This hunk is unrelated, so can you send it as a separate patch?  (It counts as
obvious, so won't need separate approval.)

>  
>  
>  /* PSTATE field name for the MSR instruction this is encoded in "op1:op2:CRm".
> diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
> index 9713ff08d1a..44551ce234c 100644
> --- a/opcodes/aarch64-sys-regs.def
> +++ b/opcodes/aarch64-sys-regs.def
> @@ -589,6 +589,14 @@
>    SYSREG ("mpam1_el12",		CPENC (3,5,10,5,0),	0,			AARCH64_NO_FEATURES)
>    SYSREG ("mpam2_el2",		CPENC (3,4,10,5,0),	0,			AARCH64_NO_FEATURES)
>    SYSREG ("mpam3_el3",		CPENC (3,6,10,5,0),	0,			AARCH64_NO_FEATURES)
> +  SYSREG ("mpambw0_el1",	CPENC (3,0,10,5,5),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambw1_el1",	CPENC (3,0,10,5,4),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambw1_el12",	CPENC (3,5,10,5,4),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambw2_el2",	CPENC (3,4,10,5,4),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambw3_el3",	CPENC (3,6,10,5,4),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambwcap_el2",	CPENC (3,4,10,5,6),	F_ARCHEXT,		AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambwidr_el1",	CPENC (3,0,10,4,5),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (V8_8A))
> +  SYSREG ("mpambwsm_el1",	CPENC (3,0,10,5,7),	F_ARCHEXT,		AARCH64_FEATURES (2, SME, V8_8A))
>    SYSREG ("mpamhcr_el2",	CPENC (3,4,10,4,0),	0,			AARCH64_NO_FEATURES)
>    SYSREG ("mpamidr_el1",	CPENC (3,0,10,4,4),	F_REG_READ,		AARCH64_NO_FEATURES)
>    SYSREG ("mpamsm_el1",		CPENC (3,0,10,5,3),	F_ARCHEXT,		AARCH64_FEATURE (SME))
> -- 
> 2.39.5
>

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