[PATCH V4 6/8] ld: aarch64: make EH Frame parsing aware of augmentation char 'G'
Richard Earnshaw
Richard.Earnshaw@arm.com
Fri Jul 11 13:19:33 GMT 2025
On 09/07/2025 22:44, Jose E. Marchesi via Binutils wrote:
> As per the DWARF for the Arm 64-bit Architecture (AArch64)
> specification, the augmentation char 'G' indicates that associated
> frames may modify MTE tags on the stack space they use.
>
> Add knowledge of the 'G' augmentation char to the EH Frame parsing
> code.
>
> ChangeLog:
>
> * bfd/elf-eh-frame.c (_bfd_elf_parse_eh_frame): Accommodate
> augmentation char 'G'.
> * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test.
> * ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s: New test.
> * ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s: New test.
> * ld/testsuite/ld-aarch64/mte-tagged-frame.d: New test.
> ---
> bfd/elf-eh-frame.c | 1 +
> ld/testsuite/ld-aarch64/aarch64-elf.exp | 2 ++
> .../ld-aarch64/mte-tagged-frame-bar.s | 17 +++++++++
> .../ld-aarch64/mte-tagged-frame-foo.s | 16 +++++++++
> ld/testsuite/ld-aarch64/mte-tagged-frame.d | 35 +++++++++++++++++++
> 5 files changed, 71 insertions(+)
> create mode 100644 ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s
> create mode 100644 ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s
> create mode 100644 ld/testsuite/ld-aarch64/mte-tagged-frame.d
>
> diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
> index ce17f715caa..6720b34fbc9 100644
> --- a/bfd/elf-eh-frame.c
> +++ b/bfd/elf-eh-frame.c
> @@ -802,6 +802,7 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
> switch (*aug++)
> {
> case 'B':
> + case 'G':
> if (abfd->arch_info->arch != bfd_arch_aarch64)
> goto unrecognized;
> break;
> diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
> index 4de498fc381..2d444e7d1e2 100644
> --- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
> +++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
> @@ -376,6 +376,8 @@ run_dump_test_lp64 "variant_pcs-r"
> run_dump_test_lp64 "variant_pcs-shared"
> run_dump_test_lp64 "variant_pcs-now"
>
> +run_dump_test_lp64 "mte-tagged-frame"
> +
> set aarch64elflinktests {
> {"ld-aarch64/so with global symbol" "-shared" "" "" {copy-reloc-so.s}
> {} "copy-reloc-so.so"}
> diff --git a/ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s b/ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s
> new file mode 100644
> index 00000000000..0bd56191912
> --- /dev/null
> +++ b/ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s
> @@ -0,0 +1,17 @@
> + .text
> + .global bar
> + .type bar, %function
> +bar:
> + .cfi_startproc
> + .cfi_mte_tagged_frame
> + stp x19, x20, [sp, -144]!
> + .cfi_def_cfa_offset 144
> + .cfi_offset 19, -144
> + .cfi_offset 20, -136
> + ldp x19, x20, [sp], 144
> + .cfi_restore 20
> + .cfi_restore 19
> + .cfi_def_cfa_offset 0
> + ret
> + .cfi_endproc
> + .size bar, .-bar
> diff --git a/ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s b/ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s
> new file mode 100644
> index 00000000000..af5a8c42f95
> --- /dev/null
> +++ b/ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s
> @@ -0,0 +1,16 @@
> + .text
> + .global foo
> + .type foo, %function
> +foo:
> + .cfi_startproc
> + stp x19, x20, [sp, -32]!
> + .cfi_def_cfa_offset 32
> + .cfi_offset 19, -32
> + .cfi_offset 20, -16
> + ldp x19, x20, [sp], 32
> + .cfi_restore 20
> + .cfi_restore 19
> + .cfi_def_cfa_offset 0
> + ret
> + .cfi_endproc
> + .size foo, .-foo
> diff --git a/ld/testsuite/ld-aarch64/mte-tagged-frame.d b/ld/testsuite/ld-aarch64/mte-tagged-frame.d
> new file mode 100644
> index 00000000000..dd667fe5ca7
> --- /dev/null
> +++ b/ld/testsuite/ld-aarch64/mte-tagged-frame.d
> @@ -0,0 +1,35 @@
> +#source: mte-tagged-frame-foo.s
> +#source: mte-tagged-frame-bar.s
> +#ld: -shared
> +#objdump: -Wf
> +#name: MTE tagged EH Frame FDE
> +
> +#...
> +Contents of the .eh_frame section:
> +
> +00000000 0000000000000010 00000000 CIE
> + Version: 1
> + Augmentation: "zR"
> + Code alignment factor: 4
> + Data alignment factor: -8
> + Return address column: 30
> + Augmentation data: 1b
> + DW_CFA_def_cfa: r31 \(sp\) ofs 0
> +
> +00000014 0000000000000020 00000018 FDE cie=00000000 pc=[a-f0-9]+\.\.[a-f0-9]+
> +#...
> +
> +00000038 0000000000000014 00000000 CIE
> + Version: 1
> + Augmentation: "zRG"
> + Code alignment factor: 4
> + Data alignment factor: -8
> + Return address column: 30
> + Augmentation data: 1b
> + DW_CFA_def_cfa: r31 \(sp\) ofs 0
> + DW_CFA_nop
> + DW_CFA_nop
> + DW_CFA_nop
> +
> +00000050 000000000000001c 0000001c FDE cie=00000038 pc=[a-f0-9]+\.\.[a-f0-9]+
> +#...
The aarch64 bits are OK. But see Jan's comment
R.
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