[PATCH v4] aarch64: Support for FEAT_LSUI
Ezra.Sitorus@arm.com
Ezra.Sitorus@arm.com
Thu Jul 10 13:02:26 GMT 2025
From: Ezra Sitorus <ezra.sitorus@arm.com>
FEAT_LSUI introduces unprivileged variants of load and store instructions so
that clearing PSTATE.PAN is never required in privileged software.
---
Changes from v3:
*) New line added in lsui.d between ldtsetl and sttsetl
*) Drop whitespace change in aarch64_ins_ft
*) Fixed aarch64-tbl.h. Removed the F_HAS_ALIAS flags for the ones that
don't need it and changed the masks for the instructions which I forgot
to add last time.
Regression tested on aarch64-none-linux-gnu.
Ezra
gas/config/tc-aarch64.c | 1 +
gas/doc/c-aarch64.texi | 2 +
gas/testsuite/gas/aarch64/lsui-bad.d | 4 +
gas/testsuite/gas/aarch64/lsui-bad.l | 21 +
gas/testsuite/gas/aarch64/lsui-bad.s | 32 ++
gas/testsuite/gas/aarch64/lsui.d | 799 ++++++++++++++++++++++++++
gas/testsuite/gas/aarch64/lsui.s | 803 +++++++++++++++++++++++++++
include/opcode/aarch64.h | 2 +
opcodes/aarch64-tbl.h | 71 +++
9 files changed, 1735 insertions(+)
create mode 100644 gas/testsuite/gas/aarch64/lsui-bad.d
create mode 100644 gas/testsuite/gas/aarch64/lsui-bad.l
create mode 100644 gas/testsuite/gas/aarch64/lsui-bad.s
create mode 100644 gas/testsuite/gas/aarch64/lsui.d
create mode 100644 gas/testsuite/gas/aarch64/lsui.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index acb56044fb5..2b1cd76368d 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10642,6 +10642,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"fp", AARCH64_FEATURE (FP), AARCH64_NO_FEATURES},
{"lse", AARCH64_FEATURE (LSE), AARCH64_NO_FEATURES},
{"lse128", AARCH64_FEATURE (LSE128), AARCH64_FEATURE (LSE)},
+ {"lsui", AARCH64_FEATURE (LSUI), AARCH64_NO_FEATURES},
{"simd", AARCH64_FEATURE (SIMD), AARCH64_FEATURE (FP)},
{"pan", AARCH64_FEATURE (PAN), AARCH64_NO_FEATURES},
{"lor", AARCH64_FEATURE (LOR), AARCH64_NO_FEATURES},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 10888d1e78f..dba1044fab1 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -225,6 +225,8 @@ automatically cause those extensions to be disabled.
@tab Enable Large System extensions.
@item @code{lse128} @tab @code{lse}
@tab Enable the 128-bit Atomic Instructions extension.
+@item @code{lsui} @tab
+ @tab Enable Unprivileged Load/Store instructions.
@item @code{lut} @tab
@tab Enable the Lookup Table (LUT) extension.
@item @code{memtag} @tab
diff --git a/gas/testsuite/gas/aarch64/lsui-bad.d b/gas/testsuite/gas/aarch64/lsui-bad.d
new file mode 100644
index 00000000000..6a50e2124bc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/lsui-bad.d
@@ -0,0 +1,4 @@
+#name: Bad FEAT_LSUI instructions
+#source: lsui-bad.s
+#as:-march=armv9-a+lsui
+#error_output: lsui-bad.l
diff --git a/gas/testsuite/gas/aarch64/lsui-bad.l b/gas/testsuite/gas/aarch64/lsui-bad.l
new file mode 100644
index 00000000000..3bf7b085ff5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/lsui-bad.l
@@ -0,0 +1,21 @@
+.*: Assembler messages:
+.*: Warning: unpredictable: identical base and status registers --`sttxr w0,w1,\[x0\]'
+.*: Warning: unpredictable: identical transfer and status registers --`sttxr w0,w0,\[x1\]'
+.*: Warning: unpredictable: identical base and status registers --`sttxr w0,x1,\[x0\]'
+.*: Warning: unpredictable: identical transfer and status registers --`sttxr w0,x0,\[x1\]'
+.*: Warning: unpredictable: identical base and status registers --`stltxr w0,w1,\[x0\]'
+.*: Warning: unpredictable: identical transfer and status registers --`stltxr w0,w0,\[x1\]'
+.*: Warning: unpredictable: identical base and status registers --`stltxr w0,x1,\[x0\]'
+.*: Warning: unpredictable: identical transfer and status registers --`stltxr w0,x0,\[x1\]'
+.*: Error: reg pair must be contiguous at operand 2 -- `caspt x0,x0,x2,x3,\[x0\]'
+.*: Error: reg pair must start from even reg at operand 3 -- `caspt x0,x1,x3,x4,\[x0\]'
+.*: Error: operand 5 must be an address with base register \(no offset\) -- `caspt x0,x1,x2,x3,\[x0,#0x8\]'
+.*: Warning: unpredictable load of register pair -- `ldtnp x0,x0,\[x0\]'
+.*: Error: immediate offset out of range -512 to 504 at operand 3 -- `ldtnp x0,x1,\[x0,#508\]'
+.*: Error: unexpected address writeback at operand 3 -- `ldtnp x0,x1,\[x0,#504\]!'
+.*: Warning: unpredictable load of register pair -- `ldtp x0,x0,\[x1\]'
+.*: Warning: unpredictable transfer with writeback -- `ldtp x0,x1,\[x0,#504\]!'
+.*: Warning: unpredictable transfer with writeback -- `ldtp x0,x1,\[x0\],#504'
+.*: Warning: unpredictable load of register pair -- `ldtp q0,q0,\[x1\]'
+.*: Warning: unpredictable transfer with writeback -- `sttp x0,x1,\[x0,#504\]!'
+.*: Warning: unpredictable transfer with writeback -- `sttp x0,x1,\[x0\],#504'
diff --git a/gas/testsuite/gas/aarch64/lsui-bad.s b/gas/testsuite/gas/aarch64/lsui-bad.s
new file mode 100644
index 00000000000..aed14cdf255
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/lsui-bad.s
@@ -0,0 +1,32 @@
+sttxr:
+ sttxr w0, w1, [x0]
+ sttxr w0, w0, [x1]
+ sttxr w0, x1, [x0]
+ sttxr w0, x0, [x1]
+
+stltxr:
+ stltxr w0, w1, [x0]
+ stltxr w0, w0, [x1]
+ stltxr w0, x1, [x0]
+ stltxr w0, x0, [x1]
+
+caspt:
+ caspt x0, x0, x2, x3, [x0]
+ caspt x0, x1, x3, x4, [x0]
+ caspt x0, x1, x2, x3, [x0, #0x8]
+
+ldtnp:
+ ldtnp x0, x0, [x0]
+ ldtnp q0, q1, [x0]
+ ldtnp x0, x1, [x0, #508]
+ ldtnp x0, x1, [x0, #504]!
+
+ldtp:
+ ldtp x0, x0, [x1]
+ ldtp x0, x1, [x0, #504]!
+ ldtp x0, x1, [x0], #504
+ ldtp q0, q0, [x1]
+
+sttp:
+ sttp x0, x1, [x0, #504]!
+ sttp x0, x1, [x0], #504
diff --git a/gas/testsuite/gas/aarch64/lsui.d b/gas/testsuite/gas/aarch64/lsui.d
new file mode 100644
index 00000000000..0a052c37c56
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/lsui.d
@@ -0,0 +1,799 @@
+#name: FEAT_LSUI Test
+#objdump: -dr
+#as:-march=armv9-a+lsui+fp
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+.* <ldtxr>:
+.*: 895f7c00 ldtxr w0, \[x0\]
+.*: 895f7fe0 ldtxr w0, \[sp\]
+.*: 895f7c1f ldtxr wzr, \[x0\]
+.*: c95f7c00 ldtxr x0, \[x0\]
+.*: c95f7fe0 ldtxr x0, \[sp\]
+.*: c95f7c1f ldtxr xzr, \[x0\]
+
+.* <ldatxr>:
+.*: 895ffc00 ldatxr w0, \[x0\]
+.*: 895fffe0 ldatxr w0, \[sp\]
+.*: 895ffc1f ldatxr wzr, \[x0\]
+.*: c95ffc00 ldatxr x0, \[x0\]
+.*: c95fffe0 ldatxr x0, \[sp\]
+.*: c95ffc1f ldatxr xzr, \[x0\]
+
+.* <sttxr>:
+.*: 89007c44 sttxr w0, w4, \[x2\]
+.*: 89007fe4 sttxr w0, w4, \[sp\]
+.*: 89007c5f sttxr w0, wzr, \[x2\]
+.*: 89007fff sttxr w0, wzr, \[sp\]
+.*: 891d7c04 sttxr w29, w4, \[x0\]
+.*: 891d7fe4 sttxr w29, w4, \[sp\]
+.*: 891d7c1f sttxr w29, wzr, \[x0\]
+.*: 891d7fff sttxr w29, wzr, \[sp\]
+.*: c9007c44 sttxr w0, x4, \[x2\]
+.*: c9007fe4 sttxr w0, x4, \[sp\]
+.*: c9007c5f sttxr w0, xzr, \[x2\]
+.*: c9007fff sttxr w0, xzr, \[sp\]
+.*: c91d7c04 sttxr w29, x4, \[x0\]
+.*: c91d7fe4 sttxr w29, x4, \[sp\]
+.*: c91d7c1f sttxr w29, xzr, \[x0\]
+.*: c91d7fff sttxr w29, xzr, \[sp\]
+
+.* <stltxr>:
+.*: 8900fc44 stltxr w0, w4, \[x2\]
+.*: 8900ffe4 stltxr w0, w4, \[sp\]
+.*: 8900fc5f stltxr w0, wzr, \[x2\]
+.*: 8900ffff stltxr w0, wzr, \[sp\]
+.*: 891dfc04 stltxr w29, w4, \[x0\]
+.*: 891dffe4 stltxr w29, w4, \[sp\]
+.*: 891dfc1f stltxr w29, wzr, \[x0\]
+.*: 891dffff stltxr w29, wzr, \[sp\]
+.*: c900fc44 stltxr w0, x4, \[x2\]
+.*: c900ffe4 stltxr w0, x4, \[sp\]
+.*: c900fc5f stltxr w0, xzr, \[x2\]
+.*: c900ffff stltxr w0, xzr, \[sp\]
+.*: c91dfc04 stltxr w29, x4, \[x0\]
+.*: c91dffe4 stltxr w29, x4, \[sp\]
+.*: c91dfc1f stltxr w29, xzr, \[x0\]
+.*: c91dffff stltxr w29, xzr, \[sp\]
+
+.* <cast>:
+.*: c9807c00 cast x0, x0, \[x0\]
+.*: c9807fe0 cast x0, x0, \[sp\]
+.*: c9807c1f cast x0, xzr, \[x0\]
+.*: c9807fff cast x0, xzr, \[sp\]
+.*: c99f7c00 cast xzr, x0, \[x0\]
+.*: c99f7fe0 cast xzr, x0, \[sp\]
+.*: c99f7c1f cast xzr, xzr, \[x0\]
+.*: c99f7fff cast xzr, xzr, \[sp\]
+
+.* <casat>:
+.*: c9c07c00 casat x0, x0, \[x0\]
+.*: c9c07fe0 casat x0, x0, \[sp\]
+.*: c9c07c1f casat x0, xzr, \[x0\]
+.*: c9c07fff casat x0, xzr, \[sp\]
+.*: c9df7c00 casat xzr, x0, \[x0\]
+.*: c9df7fe0 casat xzr, x0, \[sp\]
+.*: c9df7c1f casat xzr, xzr, \[x0\]
+.*: c9df7fff casat xzr, xzr, \[sp\]
+
+.* <casalt>:
+.*: c9c0fc00 casalt x0, x0, \[x0\]
+.*: c9c0ffe0 casalt x0, x0, \[sp\]
+.*: c9c0fc1f casalt x0, xzr, \[x0\]
+.*: c9c0ffff casalt x0, xzr, \[sp\]
+.*: c9dffc00 casalt xzr, x0, \[x0\]
+.*: c9dfffe0 casalt xzr, x0, \[sp\]
+.*: c9dffc1f casalt xzr, xzr, \[x0\]
+.*: c9dfffff casalt xzr, xzr, \[sp\]
+
+.* <caslt>:
+.*: c980fc00 caslt x0, x0, \[x0\]
+.*: c980ffe0 caslt x0, x0, \[sp\]
+.*: c980fc1f caslt x0, xzr, \[x0\]
+.*: c980ffff caslt x0, xzr, \[sp\]
+.*: c99ffc00 caslt xzr, x0, \[x0\]
+.*: c99fffe0 caslt xzr, x0, \[sp\]
+.*: c99ffc1f caslt xzr, xzr, \[x0\]
+.*: c99fffff caslt xzr, xzr, \[sp\]
+
+.* <caspt>:
+.*: 49807c00 caspt x0, x1, x0, x1, \[x0\]
+.*: 49807fe0 caspt x0, x1, x0, x1, \[sp\]
+.*: 49807c1c caspt x0, x1, x28, x29, \[x0\]
+.*: 49807ffc caspt x0, x1, x28, x29, \[sp\]
+.*: 499c7c00 caspt x28, x29, x0, x1, \[x0\]
+.*: 499c7fe0 caspt x28, x29, x0, x1, \[sp\]
+.*: 499c7c1c caspt x28, x29, x28, x29, \[x0\]
+.*: 499c7ffc caspt x28, x29, x28, x29, \[sp\]
+
+.* <caspat>:
+.*: 49c07c00 caspat x0, x1, x0, x1, \[x0\]
+.*: 49c07fe0 caspat x0, x1, x0, x1, \[sp\]
+.*: 49c07c1c caspat x0, x1, x28, x29, \[x0\]
+.*: 49c07ffc caspat x0, x1, x28, x29, \[sp\]
+.*: 49dc7c00 caspat x28, x29, x0, x1, \[x0\]
+.*: 49dc7fe0 caspat x28, x29, x0, x1, \[sp\]
+.*: 49dc7c1c caspat x28, x29, x28, x29, \[x0\]
+.*: 49dc7ffc caspat x28, x29, x28, x29, \[sp\]
+
+.* <caspalt>:
+.*: 49c0fc00 caspalt x0, x1, x0, x1, \[x0\]
+.*: 49c0ffe0 caspalt x0, x1, x0, x1, \[sp\]
+.*: 49c0fc1c caspalt x0, x1, x28, x29, \[x0\]
+.*: 49c0fffc caspalt x0, x1, x28, x29, \[sp\]
+.*: 49dcfc00 caspalt x28, x29, x0, x1, \[x0\]
+.*: 49dcffe0 caspalt x28, x29, x0, x1, \[sp\]
+.*: 49dcfc1c caspalt x28, x29, x28, x29, \[x0\]
+.*: 49dcfffc caspalt x28, x29, x28, x29, \[sp\]
+
+.* <casplt>:
+.*: 4980fc00 casplt x0, x1, x0, x1, \[x0\]
+.*: 4980ffe0 casplt x0, x1, x0, x1, \[sp\]
+.*: 4980fc1c casplt x0, x1, x28, x29, \[x0\]
+.*: 4980fffc casplt x0, x1, x28, x29, \[sp\]
+.*: 499cfc00 casplt x28, x29, x0, x1, \[x0\]
+.*: 499cffe0 casplt x28, x29, x0, x1, \[sp\]
+.*: 499cfc1c casplt x28, x29, x28, x29, \[x0\]
+.*: 499cfffc casplt x28, x29, x28, x29, \[sp\]
+
+.* <ldtp>:
+.*: e9400800 ldtp x0, x2, \[x0\]
+.*: e97f8800 ldtp x0, x2, \[x0, #-8\]
+.*: e9400be0 ldtp x0, x2, \[sp\]
+.*: e97f8be0 ldtp x0, x2, \[sp, #-8\]
+.*: e9407c00 ldtp x0, xzr, \[x0\]
+.*: e97ffc00 ldtp x0, xzr, \[x0, #-8\]
+.*: e9407fe0 ldtp x0, xzr, \[sp\]
+.*: e97fffe0 ldtp x0, xzr, \[sp, #-8\]
+.*: e940081f ldtp xzr, x2, \[x0\]
+.*: e97f881f ldtp xzr, x2, \[x0, #-8\]
+.*: e9400bff ldtp xzr, x2, \[sp\]
+.*: e97f8bff ldtp xzr, x2, \[sp, #-8\]
+.*: e940741f ldtp xzr, x29, \[x0\]
+.*: e97ff41f ldtp xzr, x29, \[x0, #-8\]
+.*: e94077ff ldtp xzr, x29, \[sp\]
+.*: e97ff7ff ldtp xzr, x29, \[sp, #-8\]
+.*: e9c11040 ldtp x0, x4, \[x2, #16\]!
+.*: e9ff9040 ldtp x0, x4, \[x2, #-8\]!
+.*: e9c113e0 ldtp x0, x4, \[sp, #16\]!
+.*: e9ff93e0 ldtp x0, x4, \[sp, #-8\]!
+.*: e9c17c40 ldtp x0, xzr, \[x2, #16\]!
+.*: e9fffc40 ldtp x0, xzr, \[x2, #-8\]!
+.*: e9c17fe0 ldtp x0, xzr, \[sp, #16\]!
+.*: e9ffffe0 ldtp x0, xzr, \[sp, #-8\]!
+.*: e9c1005f ldtp xzr, x0, \[x2, #16\]!
+.*: e9ff805f ldtp xzr, x0, \[x2, #-8\]!
+.*: e9c103ff ldtp xzr, x0, \[sp, #16\]!
+.*: e9ff83ff ldtp xzr, x0, \[sp, #-8\]!
+.*: e9c1745f ldtp xzr, x29, \[x2, #16\]!
+.*: e9fff45f ldtp xzr, x29, \[x2, #-8\]!
+.*: e9c177ff ldtp xzr, x29, \[sp, #16\]!
+.*: e9fff7ff ldtp xzr, x29, \[sp, #-8\]!
+.*: e8c11040 ldtp x0, x4, \[x2\], #16
+.*: e8ff9040 ldtp x0, x4, \[x2\], #-8
+.*: e8c113e0 ldtp x0, x4, \[sp\], #16
+.*: e8ff93e0 ldtp x0, x4, \[sp\], #-8
+.*: e8c17c40 ldtp x0, xzr, \[x2\], #16
+.*: e8fffc40 ldtp x0, xzr, \[x2\], #-8
+.*: e8c17fe0 ldtp x0, xzr, \[sp\], #16
+.*: e8ffffe0 ldtp x0, xzr, \[sp\], #-8
+.*: e8c1005f ldtp xzr, x0, \[x2\], #16
+.*: e8ff805f ldtp xzr, x0, \[x2\], #-8
+.*: e8c103ff ldtp xzr, x0, \[sp\], #16
+.*: e8ff83ff ldtp xzr, x0, \[sp\], #-8
+.*: e8c1745f ldtp xzr, x29, \[x2\], #16
+.*: e8fff45f ldtp xzr, x29, \[x2\], #-8
+.*: e8c177ff ldtp xzr, x29, \[sp\], #16
+.*: e8fff7ff ldtp xzr, x29, \[sp\], #-8
+.*: ed400800 ldtp q0, q2, \[x0\]
+.*: ed7f8800 ldtp q0, q2, \[x0, #-16\]
+.*: ed400be0 ldtp q0, q2, \[sp\]
+.*: ed7f8be0 ldtp q0, q2, \[sp, #-16\]
+.*: ed407c00 ldtp q0, q31, \[x0\]
+.*: ed7ffc00 ldtp q0, q31, \[x0, #-16\]
+.*: ed407fe0 ldtp q0, q31, \[sp\]
+.*: ed7fffe0 ldtp q0, q31, \[sp, #-16\]
+.*: ed40001f ldtp q31, q0, \[x0\]
+.*: ed7f801f ldtp q31, q0, \[x0, #-16\]
+.*: ed4003ff ldtp q31, q0, \[sp\]
+.*: ed7f83ff ldtp q31, q0, \[sp, #-16\]
+.*: ed40741f ldtp q31, q29, \[x0\]
+.*: ed7ff41f ldtp q31, q29, \[x0, #-16\]
+.*: ed4077ff ldtp q31, q29, \[sp\]
+.*: ed7ff7ff ldtp q31, q29, \[sp, #-16\]
+.*: edc10800 ldtp q0, q2, \[x0, #32\]!
+.*: edff8800 ldtp q0, q2, \[x0, #-16\]!
+.*: edc10be0 ldtp q0, q2, \[sp, #32\]!
+.*: edff8be0 ldtp q0, q2, \[sp, #-16\]!
+.*: edc17c00 ldtp q0, q31, \[x0, #32\]!
+.*: edfffc00 ldtp q0, q31, \[x0, #-16\]!
+.*: edc17fe0 ldtp q0, q31, \[sp, #32\]!
+.*: edffffe0 ldtp q0, q31, \[sp, #-16\]!
+.*: edc1081f ldtp q31, q2, \[x0, #32\]!
+.*: edff881f ldtp q31, q2, \[x0, #-16\]!
+.*: edc10bff ldtp q31, q2, \[sp, #32\]!
+.*: edff8bff ldtp q31, q2, \[sp, #-16\]!
+.*: edc1741f ldtp q31, q29, \[x0, #32\]!
+.*: edfff41f ldtp q31, q29, \[x0, #-16\]!
+.*: edc177ff ldtp q31, q29, \[sp, #32\]!
+.*: edfff7ff ldtp q31, q29, \[sp, #-16\]!
+.*: ecc10800 ldtp q0, q2, \[x0\], #32
+.*: ecff8800 ldtp q0, q2, \[x0\], #-16
+.*: ecc10be0 ldtp q0, q2, \[sp\], #32
+.*: ecff8be0 ldtp q0, q2, \[sp\], #-16
+.*: ecc17c00 ldtp q0, q31, \[x0\], #32
+.*: ecfffc00 ldtp q0, q31, \[x0\], #-16
+.*: ecc17fe0 ldtp q0, q31, \[sp\], #32
+.*: ecffffe0 ldtp q0, q31, \[sp\], #-16
+.*: ecc1081f ldtp q31, q2, \[x0\], #32
+.*: ecff881f ldtp q31, q2, \[x0\], #-16
+.*: ecc10bff ldtp q31, q2, \[sp\], #32
+.*: ecff8bff ldtp q31, q2, \[sp\], #-16
+.*: ecc1741f ldtp q31, q29, \[x0\], #32
+.*: ecfff41f ldtp q31, q29, \[x0\], #-16
+.*: ecc177ff ldtp q31, q29, \[sp\], #32
+.*: ecfff7ff ldtp q31, q29, \[sp\], #-16
+
+.* <sttp>:
+.*: e9000800 sttp x0, x2, \[x0\]
+.*: e93f8800 sttp x0, x2, \[x0, #-8\]
+.*: e9000be0 sttp x0, x2, \[sp\]
+.*: e93f8be0 sttp x0, x2, \[sp, #-8\]
+.*: e9007c00 sttp x0, xzr, \[x0\]
+.*: e93ffc00 sttp x0, xzr, \[x0, #-8\]
+.*: e9007fe0 sttp x0, xzr, \[sp\]
+.*: e93fffe0 sttp x0, xzr, \[sp, #-8\]
+.*: e900081f sttp xzr, x2, \[x0\]
+.*: e93f881f sttp xzr, x2, \[x0, #-8\]
+.*: e9000bff sttp xzr, x2, \[sp\]
+.*: e93f8bff sttp xzr, x2, \[sp, #-8\]
+.*: e900741f sttp xzr, x29, \[x0\]
+.*: e93ff41f sttp xzr, x29, \[x0, #-8\]
+.*: e90077ff sttp xzr, x29, \[sp\]
+.*: e93ff7ff sttp xzr, x29, \[sp, #-8\]
+.*: e9811040 sttp x0, x4, \[x2, #16\]!
+.*: e9bf9040 sttp x0, x4, \[x2, #-8\]!
+.*: e98113e0 sttp x0, x4, \[sp, #16\]!
+.*: e9bf93e0 sttp x0, x4, \[sp, #-8\]!
+.*: e9817c40 sttp x0, xzr, \[x2, #16\]!
+.*: e9bffc40 sttp x0, xzr, \[x2, #-8\]!
+.*: e9817fe0 sttp x0, xzr, \[sp, #16\]!
+.*: e9bfffe0 sttp x0, xzr, \[sp, #-8\]!
+.*: e981005f sttp xzr, x0, \[x2, #16\]!
+.*: e9bf805f sttp xzr, x0, \[x2, #-8\]!
+.*: e98103ff sttp xzr, x0, \[sp, #16\]!
+.*: e9bf83ff sttp xzr, x0, \[sp, #-8\]!
+.*: e981745f sttp xzr, x29, \[x2, #16\]!
+.*: e9bff45f sttp xzr, x29, \[x2, #-8\]!
+.*: e98177ff sttp xzr, x29, \[sp, #16\]!
+.*: e9bff7ff sttp xzr, x29, \[sp, #-8\]!
+.*: e8811040 sttp x0, x4, \[x2\], #16
+.*: e8bf9040 sttp x0, x4, \[x2\], #-8
+.*: e88113e0 sttp x0, x4, \[sp\], #16
+.*: e8bf93e0 sttp x0, x4, \[sp\], #-8
+.*: e8817c40 sttp x0, xzr, \[x2\], #16
+.*: e8bffc40 sttp x0, xzr, \[x2\], #-8
+.*: e8817fe0 sttp x0, xzr, \[sp\], #16
+.*: e8bfffe0 sttp x0, xzr, \[sp\], #-8
+.*: e881005f sttp xzr, x0, \[x2\], #16
+.*: e8bf805f sttp xzr, x0, \[x2\], #-8
+.*: e88103ff sttp xzr, x0, \[sp\], #16
+.*: e8bf83ff sttp xzr, x0, \[sp\], #-8
+.*: e881745f sttp xzr, x29, \[x2\], #16
+.*: e8bff45f sttp xzr, x29, \[x2\], #-8
+.*: e88177ff sttp xzr, x29, \[sp\], #16
+.*: e8bff7ff sttp xzr, x29, \[sp\], #-8
+.*: ed000800 sttp q0, q2, \[x0\]
+.*: ed3f8800 sttp q0, q2, \[x0, #-16\]
+.*: ed000be0 sttp q0, q2, \[sp\]
+.*: ed3f8be0 sttp q0, q2, \[sp, #-16\]
+.*: ed007c00 sttp q0, q31, \[x0\]
+.*: ed3ffc00 sttp q0, q31, \[x0, #-16\]
+.*: ed007fe0 sttp q0, q31, \[sp\]
+.*: ed3fffe0 sttp q0, q31, \[sp, #-16\]
+.*: ed00001f sttp q31, q0, \[x0\]
+.*: ed3f801f sttp q31, q0, \[x0, #-16\]
+.*: ed0003ff sttp q31, q0, \[sp\]
+.*: ed3f83ff sttp q31, q0, \[sp, #-16\]
+.*: ed00741f sttp q31, q29, \[x0\]
+.*: ed3ff41f sttp q31, q29, \[x0, #-16\]
+.*: ed0077ff sttp q31, q29, \[sp\]
+.*: ed3ff7ff sttp q31, q29, \[sp, #-16\]
+.*: ed810800 sttp q0, q2, \[x0, #32\]!
+.*: edbf8800 sttp q0, q2, \[x0, #-16\]!
+.*: ed810be0 sttp q0, q2, \[sp, #32\]!
+.*: edbf8be0 sttp q0, q2, \[sp, #-16\]!
+.*: ed817c00 sttp q0, q31, \[x0, #32\]!
+.*: edbffc00 sttp q0, q31, \[x0, #-16\]!
+.*: ed817fe0 sttp q0, q31, \[sp, #32\]!
+.*: edbfffe0 sttp q0, q31, \[sp, #-16\]!
+.*: ed81081f sttp q31, q2, \[x0, #32\]!
+.*: edbf881f sttp q31, q2, \[x0, #-16\]!
+.*: ed810bff sttp q31, q2, \[sp, #32\]!
+.*: edbf8bff sttp q31, q2, \[sp, #-16\]!
+.*: ed81741f sttp q31, q29, \[x0, #32\]!
+.*: edbff41f sttp q31, q29, \[x0, #-16\]!
+.*: ed8177ff sttp q31, q29, \[sp, #32\]!
+.*: edbff7ff sttp q31, q29, \[sp, #-16\]!
+.*: ec810800 sttp q0, q2, \[x0\], #32
+.*: ecbf8800 sttp q0, q2, \[x0\], #-16
+.*: ec810be0 sttp q0, q2, \[sp\], #32
+.*: ecbf8be0 sttp q0, q2, \[sp\], #-16
+.*: ec817c00 sttp q0, q31, \[x0\], #32
+.*: ecbffc00 sttp q0, q31, \[x0\], #-16
+.*: ec817fe0 sttp q0, q31, \[sp\], #32
+.*: ecbfffe0 sttp q0, q31, \[sp\], #-16
+.*: ec81081f sttp q31, q2, \[x0\], #32
+.*: ecbf881f sttp q31, q2, \[x0\], #-16
+.*: ec810bff sttp q31, q2, \[sp\], #32
+.*: ecbf8bff sttp q31, q2, \[sp\], #-16
+.*: ec81741f sttp q31, q29, \[x0\], #32
+.*: ecbff41f sttp q31, q29, \[x0\], #-16
+.*: ec8177ff sttp q31, q29, \[sp\], #32
+.*: ecbff7ff sttp q31, q29, \[sp\], #-16
+
+.* <swpt>:
+.*: 19208400 swpt w0, w0, \[x0\]
+.*: 192087e0 swpt w0, w0, \[sp\]
+.*: 1920841f swpt w0, wzr, \[x0\]
+.*: 192087ff swpt w0, wzr, \[sp\]
+.*: 193f8400 swpt wzr, w0, \[x0\]
+.*: 193f87e0 swpt wzr, w0, \[sp\]
+.*: 193f841f swpt wzr, wzr, \[x0\]
+.*: 193f87ff swpt wzr, wzr, \[sp\]
+.*: 59208400 swpt x0, x0, \[x0\]
+.*: 592087e0 swpt x0, x0, \[sp\]
+.*: 5920841f swpt x0, xzr, \[x0\]
+.*: 592087ff swpt x0, xzr, \[sp\]
+.*: 593f8400 swpt xzr, x0, \[x0\]
+.*: 593f87e0 swpt xzr, x0, \[sp\]
+.*: 593f841f swpt xzr, xzr, \[x0\]
+.*: 593f87ff swpt xzr, xzr, \[sp\]
+
+.* <swpta>:
+.*: 19a08400 swpta w0, w0, \[x0\]
+.*: 19a087e0 swpta w0, w0, \[sp\]
+.*: 19a0841f swpta w0, wzr, \[x0\]
+.*: 19a087ff swpta w0, wzr, \[sp\]
+.*: 19bf8400 swpta wzr, w0, \[x0\]
+.*: 19bf87e0 swpta wzr, w0, \[sp\]
+.*: 19bf841f swpta wzr, wzr, \[x0\]
+.*: 19bf87ff swpta wzr, wzr, \[sp\]
+.*: 59a08400 swpta x0, x0, \[x0\]
+.*: 59a087e0 swpta x0, x0, \[sp\]
+.*: 59a0841f swpta x0, xzr, \[x0\]
+.*: 59a087ff swpta x0, xzr, \[sp\]
+.*: 59bf8400 swpta xzr, x0, \[x0\]
+.*: 59bf87e0 swpta xzr, x0, \[sp\]
+.*: 59bf841f swpta xzr, xzr, \[x0\]
+.*: 59bf87ff swpta xzr, xzr, \[sp\]
+
+.* <swptal>:
+.*: 19e08400 swptal w0, w0, \[x0\]
+.*: 19e087e0 swptal w0, w0, \[sp\]
+.*: 19e0841f swptal w0, wzr, \[x0\]
+.*: 19e087ff swptal w0, wzr, \[sp\]
+.*: 19ff8400 swptal wzr, w0, \[x0\]
+.*: 19ff87e0 swptal wzr, w0, \[sp\]
+.*: 19ff841f swptal wzr, wzr, \[x0\]
+.*: 19ff87ff swptal wzr, wzr, \[sp\]
+.*: 59e08400 swptal x0, x0, \[x0\]
+.*: 59e087e0 swptal x0, x0, \[sp\]
+.*: 59e0841f swptal x0, xzr, \[x0\]
+.*: 59e087ff swptal x0, xzr, \[sp\]
+.*: 59ff8400 swptal xzr, x0, \[x0\]
+.*: 59ff87e0 swptal xzr, x0, \[sp\]
+.*: 59ff841f swptal xzr, xzr, \[x0\]
+.*: 59ff87ff swptal xzr, xzr, \[sp\]
+
+.* <swptl>:
+.*: 19608400 swptl w0, w0, \[x0\]
+.*: 196087e0 swptl w0, w0, \[sp\]
+.*: 1960841f swptl w0, wzr, \[x0\]
+.*: 196087ff swptl w0, wzr, \[sp\]
+.*: 197f8400 swptl wzr, w0, \[x0\]
+.*: 197f87e0 swptl wzr, w0, \[sp\]
+.*: 197f841f swptl wzr, wzr, \[x0\]
+.*: 197f87ff swptl wzr, wzr, \[sp\]
+.*: 59608400 swptl x0, x0, \[x0\]
+.*: 596087e0 swptl x0, x0, \[sp\]
+.*: 5960841f swptl x0, xzr, \[x0\]
+.*: 596087ff swptl x0, xzr, \[sp\]
+.*: 597f8400 swptl xzr, x0, \[x0\]
+.*: 597f87e0 swptl xzr, x0, \[sp\]
+.*: 597f841f swptl xzr, xzr, \[x0\]
+.*: 597f87ff swptl xzr, xzr, \[sp\]
+
+.* <ldtadd>:
+.*: 19200400 ldtadd w0, w0, \[x0\]
+.*: 192007e0 ldtadd w0, w0, \[sp\]
+.*: 1920041f sttadd w0, \[x0\]
+.*: 192007ff sttadd w0, \[sp\]
+.*: 193f0400 ldtadd wzr, w0, \[x0\]
+.*: 193f07e0 ldtadd wzr, w0, \[sp\]
+.*: 193f041f sttadd wzr, \[x0\]
+.*: 193f07ff sttadd wzr, \[sp\]
+.*: 1920041d ldtadd w0, w29, \[x0\]
+.*: 192007fd ldtadd w0, w29, \[sp\]
+.*: 193f041d ldtadd wzr, w29, \[x0\]
+.*: 193f07fd ldtadd wzr, w29, \[sp\]
+.*: 59200400 ldtadd x0, x0, \[x0\]
+.*: 592007e0 ldtadd x0, x0, \[sp\]
+.*: 5920041f sttadd x0, \[x0\]
+.*: 592007ff sttadd x0, \[sp\]
+.*: 593f0400 ldtadd xzr, x0, \[x0\]
+.*: 593f07e0 ldtadd xzr, x0, \[sp\]
+.*: 593f041f sttadd xzr, \[x0\]
+.*: 593f07ff sttadd xzr, \[sp\]
+.*: 5920041d ldtadd x0, x29, \[x0\]
+.*: 592007fd ldtadd x0, x29, \[sp\]
+.*: 593f041d ldtadd xzr, x29, \[x0\]
+.*: 593f07fd ldtadd xzr, x29, \[sp\]
+
+.* <sttadd>:
+.*: 1920041f sttadd w0, \[x0\]
+.*: 192007ff sttadd w0, \[sp\]
+.*: 193f041f sttadd wzr, \[x0\]
+.*: 193f07ff sttadd wzr, \[sp\]
+.*: 5920041f sttadd x0, \[x0\]
+.*: 592007ff sttadd x0, \[sp\]
+.*: 593f041f sttadd xzr, \[x0\]
+.*: 593f07ff sttadd xzr, \[sp\]
+
+.* <ldtadda>:
+.*: 19a00400 ldtadda w0, w0, \[x0\]
+.*: 19a007e0 ldtadda w0, w0, \[sp\]
+.*: 19a0041f ldtadda w0, wzr, \[x0\]
+.*: 19a007ff ldtadda w0, wzr, \[sp\]
+.*: 19bf0400 ldtadda wzr, w0, \[x0\]
+.*: 19bf07e0 ldtadda wzr, w0, \[sp\]
+.*: 19bf041f ldtadda wzr, wzr, \[x0\]
+.*: 19bf07ff ldtadda wzr, wzr, \[sp\]
+.*: 59a00400 ldtadda x0, x0, \[x0\]
+.*: 59a007e0 ldtadda x0, x0, \[sp\]
+.*: 59a0041f ldtadda x0, xzr, \[x0\]
+.*: 59a007ff ldtadda x0, xzr, \[sp\]
+.*: 59bf0400 ldtadda xzr, x0, \[x0\]
+.*: 59bf07e0 ldtadda xzr, x0, \[sp\]
+.*: 59bf041f ldtadda xzr, xzr, \[x0\]
+.*: 59bf07ff ldtadda xzr, xzr, \[sp\]
+
+.* <ldtaddal>:
+.*: 19e00400 ldtaddal w0, w0, \[x0\]
+.*: 19e007e0 ldtaddal w0, w0, \[sp\]
+.*: 19e0041f ldtaddal w0, wzr, \[x0\]
+.*: 19e007ff ldtaddal w0, wzr, \[sp\]
+.*: 19ff0400 ldtaddal wzr, w0, \[x0\]
+.*: 19ff07e0 ldtaddal wzr, w0, \[sp\]
+.*: 19ff041f ldtaddal wzr, wzr, \[x0\]
+.*: 19ff07ff ldtaddal wzr, wzr, \[sp\]
+.*: 59e00400 ldtaddal x0, x0, \[x0\]
+.*: 59e007e0 ldtaddal x0, x0, \[sp\]
+.*: 59e0041f ldtaddal x0, xzr, \[x0\]
+.*: 59e007ff ldtaddal x0, xzr, \[sp\]
+.*: 59ff0400 ldtaddal xzr, x0, \[x0\]
+.*: 59ff07e0 ldtaddal xzr, x0, \[sp\]
+.*: 59ff041f ldtaddal xzr, xzr, \[x0\]
+.*: 59ff07ff ldtaddal xzr, xzr, \[sp\]
+
+.* <ldtaddl>:
+.*: 19600400 ldtaddl w0, w0, \[x0\]
+.*: 196007e0 ldtaddl w0, w0, \[sp\]
+.*: 1960041f sttaddl w0, \[x0\]
+.*: 196007ff sttaddl w0, \[sp\]
+.*: 197f0400 ldtaddl wzr, w0, \[x0\]
+.*: 197f07e0 ldtaddl wzr, w0, \[sp\]
+.*: 197f041f sttaddl wzr, \[x0\]
+.*: 197f07ff sttaddl wzr, \[sp\]
+.*: 1960041d ldtaddl w0, w29, \[x0\]
+.*: 196007fd ldtaddl w0, w29, \[sp\]
+.*: 197f041d ldtaddl wzr, w29, \[x0\]
+.*: 197f07fd ldtaddl wzr, w29, \[sp\]
+.*: 59600400 ldtaddl x0, x0, \[x0\]
+.*: 596007e0 ldtaddl x0, x0, \[sp\]
+.*: 5960041f sttaddl x0, \[x0\]
+.*: 596007ff sttaddl x0, \[sp\]
+.*: 597f0400 ldtaddl xzr, x0, \[x0\]
+.*: 597f07e0 ldtaddl xzr, x0, \[sp\]
+.*: 597f041f sttaddl xzr, \[x0\]
+.*: 597f07ff sttaddl xzr, \[sp\]
+.*: 5960041d ldtaddl x0, x29, \[x0\]
+.*: 596007fd ldtaddl x0, x29, \[sp\]
+.*: 597f041d ldtaddl xzr, x29, \[x0\]
+.*: 597f07fd ldtaddl xzr, x29, \[sp\]
+
+.* <sttaddl>:
+.*: 1960041f sttaddl w0, \[x0\]
+.*: 196007ff sttaddl w0, \[sp\]
+.*: 197f041f sttaddl wzr, \[x0\]
+.*: 197f07ff sttaddl wzr, \[sp\]
+.*: 5960041f sttaddl x0, \[x0\]
+.*: 596007ff sttaddl x0, \[sp\]
+.*: 597f041f sttaddl xzr, \[x0\]
+.*: 597f07ff sttaddl xzr, \[sp\]
+
+.* <ldtclr>:
+.*: 19201400 ldtclr w0, w0, \[x0\]
+.*: 192017e0 ldtclr w0, w0, \[sp\]
+.*: 1920141f sttclr w0, \[x0\]
+.*: 192017ff sttclr w0, \[sp\]
+.*: 193f1400 ldtclr wzr, w0, \[x0\]
+.*: 193f17e0 ldtclr wzr, w0, \[sp\]
+.*: 193f141f sttclr wzr, \[x0\]
+.*: 193f17ff sttclr wzr, \[sp\]
+.*: 1920141d ldtclr w0, w29, \[x0\]
+.*: 192017fd ldtclr w0, w29, \[sp\]
+.*: 193f141d ldtclr wzr, w29, \[x0\]
+.*: 193f17fd ldtclr wzr, w29, \[sp\]
+.*: 59201400 ldtclr x0, x0, \[x0\]
+.*: 592017e0 ldtclr x0, x0, \[sp\]
+.*: 5920141f sttclr x0, \[x0\]
+.*: 592017ff sttclr x0, \[sp\]
+.*: 593f1400 ldtclr xzr, x0, \[x0\]
+.*: 593f17e0 ldtclr xzr, x0, \[sp\]
+.*: 593f141f sttclr xzr, \[x0\]
+.*: 593f17ff sttclr xzr, \[sp\]
+.*: 5920141d ldtclr x0, x29, \[x0\]
+.*: 592017fd ldtclr x0, x29, \[sp\]
+.*: 593f141d ldtclr xzr, x29, \[x0\]
+.*: 593f17fd ldtclr xzr, x29, \[sp\]
+
+.* <sttclr>:
+.*: 1920141f sttclr w0, \[x0\]
+.*: 192017ff sttclr w0, \[sp\]
+.*: 193f141f sttclr wzr, \[x0\]
+.*: 193f17ff sttclr wzr, \[sp\]
+.*: 5920141f sttclr x0, \[x0\]
+.*: 592017ff sttclr x0, \[sp\]
+.*: 593f141f sttclr xzr, \[x0\]
+.*: 593f17ff sttclr xzr, \[sp\]
+
+.* <ldtclra>:
+.*: 19a01400 ldtclra w0, w0, \[x0\]
+.*: 19a017e0 ldtclra w0, w0, \[sp\]
+.*: 19a0141f ldtclra w0, wzr, \[x0\]
+.*: 19a017ff ldtclra w0, wzr, \[sp\]
+.*: 19bf1400 ldtclra wzr, w0, \[x0\]
+.*: 19bf17e0 ldtclra wzr, w0, \[sp\]
+.*: 19bf141f ldtclra wzr, wzr, \[x0\]
+.*: 19bf17ff ldtclra wzr, wzr, \[sp\]
+.*: 59a01400 ldtclra x0, x0, \[x0\]
+.*: 59a017e0 ldtclra x0, x0, \[sp\]
+.*: 59a0141f ldtclra x0, xzr, \[x0\]
+.*: 59a017ff ldtclra x0, xzr, \[sp\]
+.*: 59bf1400 ldtclra xzr, x0, \[x0\]
+.*: 59bf17e0 ldtclra xzr, x0, \[sp\]
+.*: 59bf141f ldtclra xzr, xzr, \[x0\]
+.*: 59bf17ff ldtclra xzr, xzr, \[sp\]
+
+.* <ldtclral>:
+.*: 19e01400 ldtclral w0, w0, \[x0\]
+.*: 19e017e0 ldtclral w0, w0, \[sp\]
+.*: 19e0141f ldtclral w0, wzr, \[x0\]
+.*: 19e017ff ldtclral w0, wzr, \[sp\]
+.*: 19ff1400 ldtclral wzr, w0, \[x0\]
+.*: 19ff17e0 ldtclral wzr, w0, \[sp\]
+.*: 19ff141f ldtclral wzr, wzr, \[x0\]
+.*: 19ff17ff ldtclral wzr, wzr, \[sp\]
+.*: 59e01400 ldtclral x0, x0, \[x0\]
+.*: 59e017e0 ldtclral x0, x0, \[sp\]
+.*: 59e0141f ldtclral x0, xzr, \[x0\]
+.*: 59e017ff ldtclral x0, xzr, \[sp\]
+.*: 59ff1400 ldtclral xzr, x0, \[x0\]
+.*: 59ff17e0 ldtclral xzr, x0, \[sp\]
+.*: 59ff141f ldtclral xzr, xzr, \[x0\]
+.*: 59ff17ff ldtclral xzr, xzr, \[sp\]
+
+.* <ldtclrl>:
+.*: 19601400 ldtclrl w0, w0, \[x0\]
+.*: 196017e0 ldtclrl w0, w0, \[sp\]
+.*: 1960141f sttclrl w0, \[x0\]
+.*: 196017ff sttclrl w0, \[sp\]
+.*: 197f1400 ldtclrl wzr, w0, \[x0\]
+.*: 197f17e0 ldtclrl wzr, w0, \[sp\]
+.*: 197f141f sttclrl wzr, \[x0\]
+.*: 197f17ff sttclrl wzr, \[sp\]
+.*: 1960141d ldtclrl w0, w29, \[x0\]
+.*: 196017fd ldtclrl w0, w29, \[sp\]
+.*: 197f141d ldtclrl wzr, w29, \[x0\]
+.*: 197f17fd ldtclrl wzr, w29, \[sp\]
+.*: 59601400 ldtclrl x0, x0, \[x0\]
+.*: 596017e0 ldtclrl x0, x0, \[sp\]
+.*: 5960141f sttclrl x0, \[x0\]
+.*: 596017ff sttclrl x0, \[sp\]
+.*: 597f1400 ldtclrl xzr, x0, \[x0\]
+.*: 597f17e0 ldtclrl xzr, x0, \[sp\]
+.*: 597f141f sttclrl xzr, \[x0\]
+.*: 597f17ff sttclrl xzr, \[sp\]
+.*: 5960141d ldtclrl x0, x29, \[x0\]
+.*: 596017fd ldtclrl x0, x29, \[sp\]
+.*: 597f141d ldtclrl xzr, x29, \[x0\]
+.*: 597f17fd ldtclrl xzr, x29, \[sp\]
+
+.* <sttclrl>:
+.*: 1960141f sttclrl w0, \[x0\]
+.*: 196017ff sttclrl w0, \[sp\]
+.*: 197f141f sttclrl wzr, \[x0\]
+.*: 197f17ff sttclrl wzr, \[sp\]
+.*: 5960141f sttclrl x0, \[x0\]
+.*: 596017ff sttclrl x0, \[sp\]
+.*: 597f141f sttclrl xzr, \[x0\]
+.*: 597f17ff sttclrl xzr, \[sp\]
+
+.* <ldtset>:
+.*: 19203400 ldtset w0, w0, \[x0\]
+.*: 192037e0 ldtset w0, w0, \[sp\]
+.*: 1920341f sttset w0, \[x0\]
+.*: 192037ff sttset w0, \[sp\]
+.*: 193f3400 ldtset wzr, w0, \[x0\]
+.*: 193f37e0 ldtset wzr, w0, \[sp\]
+.*: 193f341f sttset wzr, \[x0\]
+.*: 193f37ff sttset wzr, \[sp\]
+.*: 1920341d ldtset w0, w29, \[x0\]
+.*: 192037fd ldtset w0, w29, \[sp\]
+.*: 193f341d ldtset wzr, w29, \[x0\]
+.*: 193f37fd ldtset wzr, w29, \[sp\]
+.*: 59203400 ldtset x0, x0, \[x0\]
+.*: 592037e0 ldtset x0, x0, \[sp\]
+.*: 5920341f sttset x0, \[x0\]
+.*: 592037ff sttset x0, \[sp\]
+.*: 593f3400 ldtset xzr, x0, \[x0\]
+.*: 593f37e0 ldtset xzr, x0, \[sp\]
+.*: 593f341f sttset xzr, \[x0\]
+.*: 593f37ff sttset xzr, \[sp\]
+.*: 5920341d ldtset x0, x29, \[x0\]
+.*: 592037fd ldtset x0, x29, \[sp\]
+.*: 593f341d ldtset xzr, x29, \[x0\]
+.*: 593f37fd ldtset xzr, x29, \[sp\]
+
+.* <sttset>:
+.*: 1920341f sttset w0, \[x0\]
+.*: 192037ff sttset w0, \[sp\]
+.*: 193f341f sttset wzr, \[x0\]
+.*: 193f37ff sttset wzr, \[sp\]
+.*: 5920341f sttset x0, \[x0\]
+.*: 592037ff sttset x0, \[sp\]
+.*: 593f341f sttset xzr, \[x0\]
+.*: 593f37ff sttset xzr, \[sp\]
+
+.* <ldtseta>:
+.*: 19a03400 ldtseta w0, w0, \[x0\]
+.*: 19a037e0 ldtseta w0, w0, \[sp\]
+.*: 19a0341f ldtseta w0, wzr, \[x0\]
+.*: 19a037ff ldtseta w0, wzr, \[sp\]
+.*: 19bf3400 ldtseta wzr, w0, \[x0\]
+.*: 19bf37e0 ldtseta wzr, w0, \[sp\]
+.*: 19bf341f ldtseta wzr, wzr, \[x0\]
+.*: 19bf37ff ldtseta wzr, wzr, \[sp\]
+.*: 59a03400 ldtseta x0, x0, \[x0\]
+.*: 59a037e0 ldtseta x0, x0, \[sp\]
+.*: 59a0341f ldtseta x0, xzr, \[x0\]
+.*: 59a037ff ldtseta x0, xzr, \[sp\]
+.*: 59bf3400 ldtseta xzr, x0, \[x0\]
+.*: 59bf37e0 ldtseta xzr, x0, \[sp\]
+.*: 59bf341f ldtseta xzr, xzr, \[x0\]
+.*: 59bf37ff ldtseta xzr, xzr, \[sp\]
+
+.* <ldtsetal>:
+.*: 19e03400 ldtsetal w0, w0, \[x0\]
+.*: 19e037e0 ldtsetal w0, w0, \[sp\]
+.*: 19e0341f ldtsetal w0, wzr, \[x0\]
+.*: 19e037ff ldtsetal w0, wzr, \[sp\]
+.*: 19ff3400 ldtsetal wzr, w0, \[x0\]
+.*: 19ff37e0 ldtsetal wzr, w0, \[sp\]
+.*: 19ff341f ldtsetal wzr, wzr, \[x0\]
+.*: 19ff37ff ldtsetal wzr, wzr, \[sp\]
+.*: 59e03400 ldtsetal x0, x0, \[x0\]
+.*: 59e037e0 ldtsetal x0, x0, \[sp\]
+.*: 59e0341f ldtsetal x0, xzr, \[x0\]
+.*: 59e037ff ldtsetal x0, xzr, \[sp\]
+.*: 59ff3400 ldtsetal xzr, x0, \[x0\]
+.*: 59ff37e0 ldtsetal xzr, x0, \[sp\]
+.*: 59ff341f ldtsetal xzr, xzr, \[x0\]
+.*: 59ff37ff ldtsetal xzr, xzr, \[sp\]
+
+.* <ldtsetl>:
+.*: 19603400 ldtsetl w0, w0, \[x0\]
+.*: 196037e0 ldtsetl w0, w0, \[sp\]
+.*: 1960341f sttsetl w0, \[x0\]
+.*: 196037ff sttsetl w0, \[sp\]
+.*: 197f3400 ldtsetl wzr, w0, \[x0\]
+.*: 197f37e0 ldtsetl wzr, w0, \[sp\]
+.*: 197f341f sttsetl wzr, \[x0\]
+.*: 197f37ff sttsetl wzr, \[sp\]
+.*: 1960341d ldtsetl w0, w29, \[x0\]
+.*: 196037fd ldtsetl w0, w29, \[sp\]
+.*: 197f341d ldtsetl wzr, w29, \[x0\]
+.*: 197f37fd ldtsetl wzr, w29, \[sp\]
+.*: 59603400 ldtsetl x0, x0, \[x0\]
+.*: 596037e0 ldtsetl x0, x0, \[sp\]
+.*: 5960341f sttsetl x0, \[x0\]
+.*: 596037ff sttsetl x0, \[sp\]
+.*: 597f3400 ldtsetl xzr, x0, \[x0\]
+.*: 597f37e0 ldtsetl xzr, x0, \[sp\]
+.*: 597f341f sttsetl xzr, \[x0\]
+.*: 597f37ff sttsetl xzr, \[sp\]
+.*: 5960341d ldtsetl x0, x29, \[x0\]
+.*: 596037fd ldtsetl x0, x29, \[sp\]
+.*: 597f341d ldtsetl xzr, x29, \[x0\]
+.*: 597f37fd ldtsetl xzr, x29, \[sp\]
+
+.* <sttsetl>:
+.*: 1960341f sttsetl w0, \[x0\]
+.*: 196037ff sttsetl w0, \[sp\]
+.*: 197f341f sttsetl wzr, \[x0\]
+.*: 197f37ff sttsetl wzr, \[sp\]
+.*: 5960341f sttsetl x0, \[x0\]
+.*: 596037ff sttsetl x0, \[sp\]
+.*: 597f341f sttsetl xzr, \[x0\]
+.*: 597f37ff sttsetl xzr, \[sp\]
+
+.* <ldtnp>:
+.*: e8400800 ldtnp x0, x2, \[x0\]
+.*: e87f8800 ldtnp x0, x2, \[x0, #-8\]
+.*: e8400be0 ldtnp x0, x2, \[sp\]
+.*: e87f8be0 ldtnp x0, x2, \[sp, #-8\]
+.*: e8407c00 ldtnp x0, xzr, \[x0\]
+.*: e87ffc00 ldtnp x0, xzr, \[x0, #-8\]
+.*: e8407fe0 ldtnp x0, xzr, \[sp\]
+.*: e87fffe0 ldtnp x0, xzr, \[sp, #-8\]
+.*: e840081f ldtnp xzr, x2, \[x0\]
+.*: e87f881f ldtnp xzr, x2, \[x0, #-8\]
+.*: e8400bff ldtnp xzr, x2, \[sp\]
+.*: e87f8bff ldtnp xzr, x2, \[sp, #-8\]
+.*: e840741f ldtnp xzr, x29, \[x0\]
+.*: e87ff41f ldtnp xzr, x29, \[x0, #-8\]
+.*: e84077ff ldtnp xzr, x29, \[sp\]
+.*: e87ff7ff ldtnp xzr, x29, \[sp, #-8\]
+.*: ec400800 ldtnp q0, q2, \[x0\]
+.*: ec7f8800 ldtnp q0, q2, \[x0, #-16\]
+.*: ec400be0 ldtnp q0, q2, \[sp\]
+.*: ec7f8be0 ldtnp q0, q2, \[sp, #-16\]
+.*: ec407c00 ldtnp q0, q31, \[x0\]
+.*: ec7ffc00 ldtnp q0, q31, \[x0, #-16\]
+.*: ec407fe0 ldtnp q0, q31, \[sp\]
+.*: ec7fffe0 ldtnp q0, q31, \[sp, #-16\]
+.*: ec40001f ldtnp q31, q0, \[x0\]
+.*: ec7f801f ldtnp q31, q0, \[x0, #-16\]
+.*: ec4003ff ldtnp q31, q0, \[sp\]
+.*: ec7f83ff ldtnp q31, q0, \[sp, #-16\]
+.*: ec40741f ldtnp q31, q29, \[x0\]
+.*: ec7ff41f ldtnp q31, q29, \[x0, #-16\]
+.*: ec4077ff ldtnp q31, q29, \[sp\]
+.*: ec7ff7ff ldtnp q31, q29, \[sp, #-16\]
+
+.* <sttnp>:
+.*: e8000800 sttnp x0, x2, \[x0\]
+.*: e83f8800 sttnp x0, x2, \[x0, #-8\]
+.*: e8000be0 sttnp x0, x2, \[sp\]
+.*: e83f8be0 sttnp x0, x2, \[sp, #-8\]
+.*: e8007c00 sttnp x0, xzr, \[x0\]
+.*: e83ffc00 sttnp x0, xzr, \[x0, #-8\]
+.*: e8007fe0 sttnp x0, xzr, \[sp\]
+.*: e83fffe0 sttnp x0, xzr, \[sp, #-8\]
+.*: e800081f sttnp xzr, x2, \[x0\]
+.*: e83f881f sttnp xzr, x2, \[x0, #-8\]
+.*: e8000bff sttnp xzr, x2, \[sp\]
+.*: e83f8bff sttnp xzr, x2, \[sp, #-8\]
+.*: e800741f sttnp xzr, x29, \[x0\]
+.*: e83ff41f sttnp xzr, x29, \[x0, #-8\]
+.*: e80077ff sttnp xzr, x29, \[sp\]
+.*: e83ff7ff sttnp xzr, x29, \[sp, #-8\]
+.*: ec000800 sttnp q0, q2, \[x0\]
+.*: ec3f8800 sttnp q0, q2, \[x0, #-16\]
+.*: ec000be0 sttnp q0, q2, \[sp\]
+.*: ec3f8be0 sttnp q0, q2, \[sp, #-16\]
+.*: ec007c00 sttnp q0, q31, \[x0\]
+.*: ec3ffc00 sttnp q0, q31, \[x0, #-16\]
+.*: ec007fe0 sttnp q0, q31, \[sp\]
+.*: ec3fffe0 sttnp q0, q31, \[sp, #-16\]
+.*: ec00001f sttnp q31, q0, \[x0\]
+.*: ec3f801f sttnp q31, q0, \[x0, #-16\]
+.*: ec0003ff sttnp q31, q0, \[sp\]
+.*: ec3f83ff sttnp q31, q0, \[sp, #-16\]
+.*: ec00741f sttnp q31, q29, \[x0\]
+.*: ec3ff41f sttnp q31, q29, \[x0, #-16\]
+.*: ec0077ff sttnp q31, q29, \[sp\]
+.*: ec3ff7ff sttnp q31, q29, \[sp, #-16\]
diff --git a/gas/testsuite/gas/aarch64/lsui.s b/gas/testsuite/gas/aarch64/lsui.s
new file mode 100644
index 00000000000..90063c66500
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/lsui.s
@@ -0,0 +1,803 @@
+ldtxr:
+ ldtxr w0, [x0]
+ ldtxr w0, [sp]
+ ldtxr wzr, [x0]
+ ldtxr x0, [x0]
+ ldtxr x0, [sp]
+ ldtxr xzr, [x0]
+
+ldatxr:
+ ldatxr w0, [x0]
+ ldatxr w0, [sp]
+ ldatxr wzr, [x0]
+ ldatxr x0, [x0]
+ ldatxr x0, [sp]
+ ldatxr xzr, [x0]
+
+sttxr:
+ sttxr w0, w4, [x2]
+ sttxr w0, w4, [sp]
+ sttxr w0, wzr, [x2]
+ sttxr w0, wzr, [sp]
+ sttxr w29, w4, [x0]
+ sttxr w29, w4, [sp]
+ sttxr w29, wzr, [x0]
+ sttxr w29, wzr, [sp]
+ sttxr w0, x4, [x2]
+ sttxr w0, x4, [sp]
+ sttxr w0, xzr, [x2]
+ sttxr w0, xzr, [sp]
+ sttxr w29, x4, [x0]
+ sttxr w29, x4, [sp]
+ sttxr w29, xzr, [x0]
+ sttxr w29, xzr, [sp]
+
+stltxr:
+ stltxr w0, w4, [x2]
+ stltxr w0, w4, [sp]
+ stltxr w0, wzr, [x2]
+ stltxr w0, wzr, [sp]
+ stltxr w29, w4, [x0]
+ stltxr w29, w4, [sp]
+ stltxr w29, wzr, [x0]
+ stltxr w29, wzr, [sp]
+ stltxr w0, x4, [x2]
+ stltxr w0, x4, [sp]
+ stltxr w0, xzr, [x2]
+ stltxr w0, xzr, [sp]
+ stltxr w29, x4, [x0]
+ stltxr w29, x4, [sp]
+ stltxr w29, xzr, [x0]
+ stltxr w29, xzr, [sp]
+
+cast:
+ cast x0, x0, [x0]
+ cast x0, x0, [sp]
+ cast x0, xzr, [x0]
+ cast x0, xzr, [sp]
+ cast xzr, x0, [x0]
+ cast xzr, x0, [sp]
+ cast xzr, xzr, [x0]
+ cast xzr, xzr, [sp]
+
+casat:
+ casat x0, x0, [x0]
+ casat x0, x0, [sp]
+ casat x0, xzr, [x0]
+ casat x0, xzr, [sp]
+ casat xzr, x0, [x0]
+ casat xzr, x0, [sp]
+ casat xzr, xzr, [x0]
+ casat xzr, xzr, [sp]
+
+casalt:
+ casalt x0, x0, [x0]
+ casalt x0, x0, [sp]
+ casalt x0, xzr, [x0]
+ casalt x0, xzr, [sp]
+ casalt xzr, x0, [x0]
+ casalt xzr, x0, [sp]
+ casalt xzr, xzr, [x0]
+ casalt xzr, xzr, [sp]
+
+caslt:
+ caslt x0, x0, [x0]
+ caslt x0, x0, [sp]
+ caslt x0, xzr, [x0]
+ caslt x0, xzr, [sp]
+ caslt xzr, x0, [x0]
+ caslt xzr, x0, [sp]
+ caslt xzr, xzr, [x0]
+ caslt xzr, xzr, [sp]
+
+caspt:
+ caspt x0, x1, x0, x1, [x0]
+ caspt x0, x1, x0, x1, [sp]
+ caspt x0, x1, x28, x29, [x0]
+ caspt x0, x1, x28, x29, [sp]
+ caspt x28, x29, x0, x1, [x0]
+ caspt x28, x29, x0, x1, [sp]
+ caspt x28, x29, x28, x29, [x0]
+ caspt x28, x29, x28, x29, [sp]
+
+caspat:
+ caspat x0, x1, x0, x1, [x0]
+ caspat x0, x1, x0, x1, [sp]
+ caspat x0, x1, x28, x29, [x0]
+ caspat x0, x1, x28, x29, [sp]
+ caspat x28, x29, x0, x1, [x0]
+ caspat x28, x29, x0, x1, [sp]
+ caspat x28, x29, x28, x29, [x0]
+ caspat x28, x29, x28, x29, [sp]
+
+caspalt:
+ caspalt x0, x1, x0, x1, [x0]
+ caspalt x0, x1, x0, x1, [sp]
+ caspalt x0, x1, x28, x29, [x0]
+ caspalt x0, x1, x28, x29, [sp]
+ caspalt x28, x29, x0, x1, [x0]
+ caspalt x28, x29, x0, x1, [sp]
+ caspalt x28, x29, x28, x29, [x0]
+ caspalt x28, x29, x28, x29, [sp]
+
+casplt:
+ casplt x0, x1, x0, x1, [x0]
+ casplt x0, x1, x0, x1, [sp]
+ casplt x0, x1, x28, x29, [x0]
+ casplt x0, x1, x28, x29, [sp]
+ casplt x28, x29, x0, x1, [x0]
+ casplt x28, x29, x0, x1, [sp]
+ casplt x28, x29, x28, x29, [x0]
+ casplt x28, x29, x28, x29, [sp]
+
+ldtp:
+ ldtp x0, x2, [x0]
+ ldtp x0, x2, [x0, #-8]
+ ldtp x0, x2, [sp]
+ ldtp x0, x2, [sp, #-8]
+ ldtp x0, xzr, [x0]
+ ldtp x0, xzr, [x0, #-8]
+ ldtp x0, xzr, [sp]
+ ldtp x0, xzr, [sp, #-8]
+ ldtp xzr, x2, [x0]
+ ldtp xzr, x2, [x0, #-8]
+ ldtp xzr, x2, [sp]
+ ldtp xzr, x2, [sp, #-8]
+ ldtp xzr, x29, [x0]
+ ldtp xzr, x29, [x0, #-8]
+ ldtp xzr, x29, [sp]
+ ldtp xzr, x29, [sp, #-8]
+
+ ldtp x0, x4, [x2, #16]!
+ ldtp x0, x4, [x2, #-8]!
+ ldtp x0, x4, [sp, #16]!
+ ldtp x0, x4, [sp, #-8]!
+ ldtp x0, xzr, [x2, #16]!
+ ldtp x0, xzr, [x2, #-8]!
+ ldtp x0, xzr, [sp, #16]!
+ ldtp x0, xzr, [sp, #-8]!
+ ldtp xzr, x0, [x2, #16]!
+ ldtp xzr, x0, [x2, #-8]!
+ ldtp xzr, x0, [sp, #16]!
+ ldtp xzr, x0, [sp, #-8]!
+ ldtp xzr, x29, [x2, #16]!
+ ldtp xzr, x29, [x2, #-8]!
+ ldtp xzr, x29, [sp, #16]!
+ ldtp xzr, x29, [sp, #-8]!
+
+ ldtp x0, x4, [x2], #16
+ ldtp x0, x4, [x2], #-8
+ ldtp x0, x4, [sp], #16
+ ldtp x0, x4, [sp], #-8
+ ldtp x0, xzr, [x2], #16
+ ldtp x0, xzr, [x2], #-8
+ ldtp x0, xzr, [sp], #16
+ ldtp x0, xzr, [sp], #-8
+ ldtp xzr, x0, [x2], #16
+ ldtp xzr, x0, [x2], #-8
+ ldtp xzr, x0, [sp], #16
+ ldtp xzr, x0, [sp], #-8
+ ldtp xzr, x29, [x2], #16
+ ldtp xzr, x29, [x2], #-8
+ ldtp xzr, x29, [sp], #16
+ ldtp xzr, x29, [sp], #-8
+
+ ldtp q0, q2, [x0]
+ ldtp q0, q2, [x0, #-16]
+ ldtp q0, q2, [sp]
+ ldtp q0, q2, [sp, #-16]
+ ldtp q0, q31, [x0]
+ ldtp q0, q31, [x0, #-16]
+ ldtp q0, q31, [sp]
+ ldtp q0, q31, [sp, #-16]
+ ldtp q31, q0, [x0]
+ ldtp q31, q0, [x0, #-16]
+ ldtp q31, q0, [sp]
+ ldtp q31, q0, [sp, #-16]
+ ldtp q31, q29, [x0]
+ ldtp q31, q29, [x0, #-16]
+ ldtp q31, q29, [sp]
+ ldtp q31, q29, [sp, #-16]
+
+ ldtp q0, q2, [x0, #32]!
+ ldtp q0, q2, [x0, #-16]!
+ ldtp q0, q2, [sp, #32]!
+ ldtp q0, q2, [sp, #-16]!
+ ldtp q0, q31, [x0, #32]!
+ ldtp q0, q31, [x0, #-16]!
+ ldtp q0, q31, [sp, #32]!
+ ldtp q0, q31, [sp, #-16]!
+ ldtp q31, q2, [x0, #32]!
+ ldtp q31, q2, [x0, #-16]!
+ ldtp q31, q2, [sp, #32]!
+ ldtp q31, q2, [sp, #-16]!
+ ldtp q31, q29, [x0, #32]!
+ ldtp q31, q29, [x0, #-16]!
+ ldtp q31, q29, [sp, #32]!
+ ldtp q31, q29, [sp, #-16]!
+
+ ldtp q0, q2, [x0], #32
+ ldtp q0, q2, [x0], #-16
+ ldtp q0, q2, [sp], #32
+ ldtp q0, q2, [sp], #-16
+ ldtp q0, q31, [x0], #32
+ ldtp q0, q31, [x0], #-16
+ ldtp q0, q31, [sp], #32
+ ldtp q0, q31, [sp], #-16
+ ldtp q31, q2, [x0], #32
+ ldtp q31, q2, [x0], #-16
+ ldtp q31, q2, [sp], #32
+ ldtp q31, q2, [sp], #-16
+ ldtp q31, q29, [x0], #32
+ ldtp q31, q29, [x0], #-16
+ ldtp q31, q29, [sp], #32
+ ldtp q31, q29, [sp], #-16
+
+sttp:
+ sttp x0, x2, [x0]
+ sttp x0, x2, [x0, #-8]
+ sttp x0, x2, [sp]
+ sttp x0, x2, [sp, #-8]
+ sttp x0, xzr, [x0]
+ sttp x0, xzr, [x0, #-8]
+ sttp x0, xzr, [sp]
+ sttp x0, xzr, [sp, #-8]
+ sttp xzr, x2, [x0]
+ sttp xzr, x2, [x0, #-8]
+ sttp xzr, x2, [sp]
+ sttp xzr, x2, [sp, #-8]
+ sttp xzr, x29, [x0]
+ sttp xzr, x29, [x0, #-8]
+ sttp xzr, x29, [sp]
+ sttp xzr, x29, [sp, #-8]
+
+ sttp x0, x4, [x2, #16]!
+ sttp x0, x4, [x2, #-8]!
+ sttp x0, x4, [sp, #16]!
+ sttp x0, x4, [sp, #-8]!
+ sttp x0, xzr, [x2, #16]!
+ sttp x0, xzr, [x2, #-8]!
+ sttp x0, xzr, [sp, #16]!
+ sttp x0, xzr, [sp, #-8]!
+ sttp xzr, x0, [x2, #16]!
+ sttp xzr, x0, [x2, #-8]!
+ sttp xzr, x0, [sp, #16]!
+ sttp xzr, x0, [sp, #-8]!
+ sttp xzr, x29, [x2, #16]!
+ sttp xzr, x29, [x2, #-8]!
+ sttp xzr, x29, [sp, #16]!
+ sttp xzr, x29, [sp, #-8]!
+
+ sttp x0, x4, [x2], #16
+ sttp x0, x4, [x2], #-8
+ sttp x0, x4, [sp], #16
+ sttp x0, x4, [sp], #-8
+ sttp x0, xzr, [x2], #16
+ sttp x0, xzr, [x2], #-8
+ sttp x0, xzr, [sp], #16
+ sttp x0, xzr, [sp], #-8
+ sttp xzr, x0, [x2], #16
+ sttp xzr, x0, [x2], #-8
+ sttp xzr, x0, [sp], #16
+ sttp xzr, x0, [sp], #-8
+ sttp xzr, x29, [x2], #16
+ sttp xzr, x29, [x2], #-8
+ sttp xzr, x29, [sp], #16
+ sttp xzr, x29, [sp], #-8
+
+ sttp q0, q2, [x0]
+ sttp q0, q2, [x0, #-16]
+ sttp q0, q2, [sp]
+ sttp q0, q2, [sp, #-16]
+ sttp q0, q31, [x0]
+ sttp q0, q31, [x0, #-16]
+ sttp q0, q31, [sp]
+ sttp q0, q31, [sp, #-16]
+ sttp q31, q0, [x0]
+ sttp q31, q0, [x0, #-16]
+ sttp q31, q0, [sp]
+ sttp q31, q0, [sp, #-16]
+ sttp q31, q29, [x0]
+ sttp q31, q29, [x0, #-16]
+ sttp q31, q29, [sp]
+ sttp q31, q29, [sp, #-16]
+
+ sttp q0, q2, [x0, #32]!
+ sttp q0, q2, [x0, #-16]!
+ sttp q0, q2, [sp, #32]!
+ sttp q0, q2, [sp, #-16]!
+ sttp q0, q31, [x0, #32]!
+ sttp q0, q31, [x0, #-16]!
+ sttp q0, q31, [sp, #32]!
+ sttp q0, q31, [sp, #-16]!
+ sttp q31, q2, [x0, #32]!
+ sttp q31, q2, [x0, #-16]!
+ sttp q31, q2, [sp, #32]!
+ sttp q31, q2, [sp, #-16]!
+ sttp q31, q29, [x0, #32]!
+ sttp q31, q29, [x0, #-16]!
+ sttp q31, q29, [sp, #32]!
+ sttp q31, q29, [sp, #-16]!
+
+ sttp q0, q2, [x0], #32
+ sttp q0, q2, [x0], #-16
+ sttp q0, q2, [sp], #32
+ sttp q0, q2, [sp], #-16
+ sttp q0, q31, [x0], #32
+ sttp q0, q31, [x0], #-16
+ sttp q0, q31, [sp], #32
+ sttp q0, q31, [sp], #-16
+ sttp q31, q2, [x0], #32
+ sttp q31, q2, [x0], #-16
+ sttp q31, q2, [sp], #32
+ sttp q31, q2, [sp], #-16
+ sttp q31, q29, [x0], #32
+ sttp q31, q29, [x0], #-16
+ sttp q31, q29, [sp], #32
+ sttp q31, q29, [sp], #-16
+
+swpt:
+ swpt w0, w0, [x0]
+ swpt w0, w0, [sp]
+ swpt w0, wzr, [x0]
+ swpt w0, wzr, [sp]
+ swpt wzr, w0, [x0]
+ swpt wzr, w0, [sp]
+ swpt wzr, wzr, [x0]
+ swpt wzr, wzr, [sp]
+ swpt x0, x0, [x0]
+ swpt x0, x0, [sp]
+ swpt x0, xzr, [x0]
+ swpt x0, xzr, [sp]
+ swpt xzr, x0, [x0]
+ swpt xzr, x0, [sp]
+ swpt xzr, xzr, [x0]
+ swpt xzr, xzr, [sp]
+
+swpta:
+ swpta w0, w0, [x0]
+ swpta w0, w0, [sp]
+ swpta w0, wzr, [x0]
+ swpta w0, wzr, [sp]
+ swpta wzr, w0, [x0]
+ swpta wzr, w0, [sp]
+ swpta wzr, wzr, [x0]
+ swpta wzr, wzr, [sp]
+ swpta x0, x0, [x0]
+ swpta x0, x0, [sp]
+ swpta x0, xzr, [x0]
+ swpta x0, xzr, [sp]
+ swpta xzr, x0, [x0]
+ swpta xzr, x0, [sp]
+ swpta xzr, xzr, [x0]
+ swpta xzr, xzr, [sp]
+
+swptal:
+ swptal w0, w0, [x0]
+ swptal w0, w0, [sp]
+ swptal w0, wzr, [x0]
+ swptal w0, wzr, [sp]
+ swptal wzr, w0, [x0]
+ swptal wzr, w0, [sp]
+ swptal wzr, wzr, [x0]
+ swptal wzr, wzr, [sp]
+ swptal x0, x0, [x0]
+ swptal x0, x0, [sp]
+ swptal x0, xzr, [x0]
+ swptal x0, xzr, [sp]
+ swptal xzr, x0, [x0]
+ swptal xzr, x0, [sp]
+ swptal xzr, xzr, [x0]
+ swptal xzr, xzr, [sp]
+
+swptl:
+ swptl w0, w0, [x0]
+ swptl w0, w0, [sp]
+ swptl w0, wzr, [x0]
+ swptl w0, wzr, [sp]
+ swptl wzr, w0, [x0]
+ swptl wzr, w0, [sp]
+ swptl wzr, wzr, [x0]
+ swptl wzr, wzr, [sp]
+ swptl x0, x0, [x0]
+ swptl x0, x0, [sp]
+ swptl x0, xzr, [x0]
+ swptl x0, xzr, [sp]
+ swptl xzr, x0, [x0]
+ swptl xzr, x0, [sp]
+ swptl xzr, xzr, [x0]
+ swptl xzr, xzr, [sp]
+
+ldtadd:
+ ldtadd w0, w0, [x0]
+ ldtadd w0, w0, [sp]
+ ldtadd w0, wzr, [x0]
+ ldtadd w0, wzr, [sp]
+ ldtadd wzr, w0, [x0]
+ ldtadd wzr, w0, [sp]
+ ldtadd wzr, wzr, [x0]
+ ldtadd wzr, wzr, [sp]
+ ldtadd w0, w29, [x0]
+ ldtadd w0, w29, [sp]
+ ldtadd wzr, w29, [x0]
+ ldtadd wzr, w29, [sp]
+ ldtadd x0, x0, [x0]
+ ldtadd x0, x0, [sp]
+ ldtadd x0, xzr, [x0]
+ ldtadd x0, xzr, [sp]
+ ldtadd xzr, x0, [x0]
+ ldtadd xzr, x0, [sp]
+ ldtadd xzr, xzr, [x0]
+ ldtadd xzr, xzr, [sp]
+ ldtadd x0, x29, [x0]
+ ldtadd x0, x29, [sp]
+ ldtadd xzr, x29, [x0]
+ ldtadd xzr, x29, [sp]
+
+sttadd:
+ sttadd w0, [x0]
+ sttadd w0, [sp]
+ sttadd wzr, [x0]
+ sttadd wzr, [sp]
+ sttadd x0, [x0]
+ sttadd x0, [sp]
+ sttadd xzr, [x0]
+ sttadd xzr, [sp]
+
+ldtadda:
+ ldtadda w0, w0, [x0]
+ ldtadda w0, w0, [sp]
+ ldtadda w0, wzr, [x0]
+ ldtadda w0, wzr, [sp]
+ ldtadda wzr, w0, [x0]
+ ldtadda wzr, w0, [sp]
+ ldtadda wzr, wzr, [x0]
+ ldtadda wzr, wzr, [sp]
+ ldtadda x0, x0, [x0]
+ ldtadda x0, x0, [sp]
+ ldtadda x0, xzr, [x0]
+ ldtadda x0, xzr, [sp]
+ ldtadda xzr, x0, [x0]
+ ldtadda xzr, x0, [sp]
+ ldtadda xzr, xzr, [x0]
+ ldtadda xzr, xzr, [sp]
+
+ldtaddal:
+ ldtaddal w0, w0, [x0]
+ ldtaddal w0, w0, [sp]
+ ldtaddal w0, wzr, [x0]
+ ldtaddal w0, wzr, [sp]
+ ldtaddal wzr, w0, [x0]
+ ldtaddal wzr, w0, [sp]
+ ldtaddal wzr, wzr, [x0]
+ ldtaddal wzr, wzr, [sp]
+ ldtaddal x0, x0, [x0]
+ ldtaddal x0, x0, [sp]
+ ldtaddal x0, xzr, [x0]
+ ldtaddal x0, xzr, [sp]
+ ldtaddal xzr, x0, [x0]
+ ldtaddal xzr, x0, [sp]
+ ldtaddal xzr, xzr, [x0]
+ ldtaddal xzr, xzr, [sp]
+
+ldtaddl:
+ ldtaddl w0, w0, [x0]
+ ldtaddl w0, w0, [sp]
+ ldtaddl w0, wzr, [x0]
+ ldtaddl w0, wzr, [sp]
+ ldtaddl wzr, w0, [x0]
+ ldtaddl wzr, w0, [sp]
+ ldtaddl wzr, wzr, [x0]
+ ldtaddl wzr, wzr, [sp]
+ ldtaddl w0, w29, [x0]
+ ldtaddl w0, w29, [sp]
+ ldtaddl wzr, w29, [x0]
+ ldtaddl wzr, w29, [sp]
+ ldtaddl x0, x0, [x0]
+ ldtaddl x0, x0, [sp]
+ ldtaddl x0, xzr, [x0]
+ ldtaddl x0, xzr, [sp]
+ ldtaddl xzr, x0, [x0]
+ ldtaddl xzr, x0, [sp]
+ ldtaddl xzr, xzr, [x0]
+ ldtaddl xzr, xzr, [sp]
+ ldtaddl x0, x29, [x0]
+ ldtaddl x0, x29, [sp]
+ ldtaddl xzr, x29, [x0]
+ ldtaddl xzr, x29, [sp]
+
+sttaddl:
+ sttaddl w0, [x0]
+ sttaddl w0, [sp]
+ sttaddl wzr, [x0]
+ sttaddl wzr, [sp]
+ sttaddl x0, [x0]
+ sttaddl x0, [sp]
+ sttaddl xzr, [x0]
+ sttaddl xzr, [sp]
+
+ldtclr:
+ ldtclr w0, w0, [x0]
+ ldtclr w0, w0, [sp]
+ ldtclr w0, wzr, [x0]
+ ldtclr w0, wzr, [sp]
+ ldtclr wzr, w0, [x0]
+ ldtclr wzr, w0, [sp]
+ ldtclr wzr, wzr, [x0]
+ ldtclr wzr, wzr, [sp]
+ ldtclr w0, w29, [x0]
+ ldtclr w0, w29, [sp]
+ ldtclr wzr, w29, [x0]
+ ldtclr wzr, w29, [sp]
+ ldtclr x0, x0, [x0]
+ ldtclr x0, x0, [sp]
+ ldtclr x0, xzr, [x0]
+ ldtclr x0, xzr, [sp]
+ ldtclr xzr, x0, [x0]
+ ldtclr xzr, x0, [sp]
+ ldtclr xzr, xzr, [x0]
+ ldtclr xzr, xzr, [sp]
+ ldtclr x0, x29, [x0]
+ ldtclr x0, x29, [sp]
+ ldtclr xzr, x29, [x0]
+ ldtclr xzr, x29, [sp]
+
+sttclr:
+ sttclr w0, [x0]
+ sttclr w0, [sp]
+ sttclr wzr, [x0]
+ sttclr wzr, [sp]
+ sttclr x0, [x0]
+ sttclr x0, [sp]
+ sttclr xzr, [x0]
+ sttclr xzr, [sp]
+
+ldtclra:
+ ldtclra w0, w0, [x0]
+ ldtclra w0, w0, [sp]
+ ldtclra w0, wzr, [x0]
+ ldtclra w0, wzr, [sp]
+ ldtclra wzr, w0, [x0]
+ ldtclra wzr, w0, [sp]
+ ldtclra wzr, wzr, [x0]
+ ldtclra wzr, wzr, [sp]
+ ldtclra x0, x0, [x0]
+ ldtclra x0, x0, [sp]
+ ldtclra x0, xzr, [x0]
+ ldtclra x0, xzr, [sp]
+ ldtclra xzr, x0, [x0]
+ ldtclra xzr, x0, [sp]
+ ldtclra xzr, xzr, [x0]
+ ldtclra xzr, xzr, [sp]
+
+ldtclral:
+ ldtclral w0, w0, [x0]
+ ldtclral w0, w0, [sp]
+ ldtclral w0, wzr, [x0]
+ ldtclral w0, wzr, [sp]
+ ldtclral wzr, w0, [x0]
+ ldtclral wzr, w0, [sp]
+ ldtclral wzr, wzr, [x0]
+ ldtclral wzr, wzr, [sp]
+ ldtclral x0, x0, [x0]
+ ldtclral x0, x0, [sp]
+ ldtclral x0, xzr, [x0]
+ ldtclral x0, xzr, [sp]
+ ldtclral xzr, x0, [x0]
+ ldtclral xzr, x0, [sp]
+ ldtclral xzr, xzr, [x0]
+ ldtclral xzr, xzr, [sp]
+
+ldtclrl:
+ ldtclrl w0, w0, [x0]
+ ldtclrl w0, w0, [sp]
+ ldtclrl w0, wzr, [x0]
+ ldtclrl w0, wzr, [sp]
+ ldtclrl wzr, w0, [x0]
+ ldtclrl wzr, w0, [sp]
+ ldtclrl wzr, wzr, [x0]
+ ldtclrl wzr, wzr, [sp]
+ ldtclrl w0, w29, [x0]
+ ldtclrl w0, w29, [sp]
+ ldtclrl wzr, w29, [x0]
+ ldtclrl wzr, w29, [sp]
+ ldtclrl x0, x0, [x0]
+ ldtclrl x0, x0, [sp]
+ ldtclrl x0, xzr, [x0]
+ ldtclrl x0, xzr, [sp]
+ ldtclrl xzr, x0, [x0]
+ ldtclrl xzr, x0, [sp]
+ ldtclrl xzr, xzr, [x0]
+ ldtclrl xzr, xzr, [sp]
+ ldtclrl x0, x29, [x0]
+ ldtclrl x0, x29, [sp]
+ ldtclrl xzr, x29, [x0]
+ ldtclrl xzr, x29, [sp]
+
+sttclrl:
+ sttclrl w0, [x0]
+ sttclrl w0, [sp]
+ sttclrl wzr, [x0]
+ sttclrl wzr, [sp]
+ sttclrl x0, [x0]
+ sttclrl x0, [sp]
+ sttclrl xzr, [x0]
+ sttclrl xzr, [sp]
+
+ldtset:
+ ldtset w0, w0, [x0]
+ ldtset w0, w0, [sp]
+ ldtset w0, wzr, [x0]
+ ldtset w0, wzr, [sp]
+ ldtset wzr, w0, [x0]
+ ldtset wzr, w0, [sp]
+ ldtset wzr, wzr, [x0]
+ ldtset wzr, wzr, [sp]
+ ldtset w0, w29, [x0]
+ ldtset w0, w29, [sp]
+ ldtset wzr, w29, [x0]
+ ldtset wzr, w29, [sp]
+ ldtset x0, x0, [x0]
+ ldtset x0, x0, [sp]
+ ldtset x0, xzr, [x0]
+ ldtset x0, xzr, [sp]
+ ldtset xzr, x0, [x0]
+ ldtset xzr, x0, [sp]
+ ldtset xzr, xzr, [x0]
+ ldtset xzr, xzr, [sp]
+ ldtset x0, x29, [x0]
+ ldtset x0, x29, [sp]
+ ldtset xzr, x29, [x0]
+ ldtset xzr, x29, [sp]
+
+sttset:
+ sttset w0, [x0]
+ sttset w0, [sp]
+ sttset wzr, [x0]
+ sttset wzr, [sp]
+ sttset x0, [x0]
+ sttset x0, [sp]
+ sttset xzr, [x0]
+ sttset xzr, [sp]
+
+ldtseta:
+ ldtseta w0, w0, [x0]
+ ldtseta w0, w0, [sp]
+ ldtseta w0, wzr, [x0]
+ ldtseta w0, wzr, [sp]
+ ldtseta wzr, w0, [x0]
+ ldtseta wzr, w0, [sp]
+ ldtseta wzr, wzr, [x0]
+ ldtseta wzr, wzr, [sp]
+ ldtseta x0, x0, [x0]
+ ldtseta x0, x0, [sp]
+ ldtseta x0, xzr, [x0]
+ ldtseta x0, xzr, [sp]
+ ldtseta xzr, x0, [x0]
+ ldtseta xzr, x0, [sp]
+ ldtseta xzr, xzr, [x0]
+ ldtseta xzr, xzr, [sp]
+
+ldtsetal:
+ ldtsetal w0, w0, [x0]
+ ldtsetal w0, w0, [sp]
+ ldtsetal w0, wzr, [x0]
+ ldtsetal w0, wzr, [sp]
+ ldtsetal wzr, w0, [x0]
+ ldtsetal wzr, w0, [sp]
+ ldtsetal wzr, wzr, [x0]
+ ldtsetal wzr, wzr, [sp]
+ ldtsetal x0, x0, [x0]
+ ldtsetal x0, x0, [sp]
+ ldtsetal x0, xzr, [x0]
+ ldtsetal x0, xzr, [sp]
+ ldtsetal xzr, x0, [x0]
+ ldtsetal xzr, x0, [sp]
+ ldtsetal xzr, xzr, [x0]
+ ldtsetal xzr, xzr, [sp]
+
+ldtsetl:
+ ldtsetl w0, w0, [x0]
+ ldtsetl w0, w0, [sp]
+ ldtsetl w0, wzr, [x0]
+ ldtsetl w0, wzr, [sp]
+ ldtsetl wzr, w0, [x0]
+ ldtsetl wzr, w0, [sp]
+ ldtsetl wzr, wzr, [x0]
+ ldtsetl wzr, wzr, [sp]
+ ldtsetl w0, w29, [x0]
+ ldtsetl w0, w29, [sp]
+ ldtsetl wzr, w29, [x0]
+ ldtsetl wzr, w29, [sp]
+ ldtsetl x0, x0, [x0]
+ ldtsetl x0, x0, [sp]
+ ldtsetl x0, xzr, [x0]
+ ldtsetl x0, xzr, [sp]
+ ldtsetl xzr, x0, [x0]
+ ldtsetl xzr, x0, [sp]
+ ldtsetl xzr, xzr, [x0]
+ ldtsetl xzr, xzr, [sp]
+ ldtsetl x0, x29, [x0]
+ ldtsetl x0, x29, [sp]
+ ldtsetl xzr, x29, [x0]
+ ldtsetl xzr, x29, [sp]
+
+sttsetl:
+ sttsetl w0, [x0]
+ sttsetl w0, [sp]
+ sttsetl wzr, [x0]
+ sttsetl wzr, [sp]
+ sttsetl x0, [x0]
+ sttsetl x0, [sp]
+ sttsetl xzr, [x0]
+ sttsetl xzr, [sp]
+
+ldtnp:
+ ldtnp x0, x2, [x0]
+ ldtnp x0, x2, [x0, #-8]
+ ldtnp x0, x2, [sp]
+ ldtnp x0, x2, [sp, #-8]
+ ldtnp x0, xzr, [x0]
+ ldtnp x0, xzr, [x0, #-8]
+ ldtnp x0, xzr, [sp]
+ ldtnp x0, xzr, [sp, #-8]
+ ldtnp xzr, x2, [x0]
+ ldtnp xzr, x2, [x0, #-8]
+ ldtnp xzr, x2, [sp]
+ ldtnp xzr, x2, [sp, #-8]
+ ldtnp xzr, x29, [x0]
+ ldtnp xzr, x29, [x0, #-8]
+ ldtnp xzr, x29, [sp]
+ ldtnp xzr, x29, [sp, #-8]
+
+ ldtnp q0, q2, [x0]
+ ldtnp q0, q2, [x0, #-16]
+ ldtnp q0, q2, [sp]
+ ldtnp q0, q2, [sp, #-16]
+ ldtnp q0, q31, [x0]
+ ldtnp q0, q31, [x0, #-16]
+ ldtnp q0, q31, [sp]
+ ldtnp q0, q31, [sp, #-16]
+ ldtnp q31, q0, [x0]
+ ldtnp q31, q0, [x0, #-16]
+ ldtnp q31, q0, [sp]
+ ldtnp q31, q0, [sp, #-16]
+ ldtnp q31, q29, [x0]
+ ldtnp q31, q29, [x0, #-16]
+ ldtnp q31, q29, [sp]
+ ldtnp q31, q29, [sp, #-16]
+
+sttnp:
+ sttnp x0, x2, [x0]
+ sttnp x0, x2, [x0, #-8]
+ sttnp x0, x2, [sp]
+ sttnp x0, x2, [sp, #-8]
+ sttnp x0, xzr, [x0]
+ sttnp x0, xzr, [x0, #-8]
+ sttnp x0, xzr, [sp]
+ sttnp x0, xzr, [sp, #-8]
+ sttnp xzr, x2, [x0]
+ sttnp xzr, x2, [x0, #-8]
+ sttnp xzr, x2, [sp]
+ sttnp xzr, x2, [sp, #-8]
+ sttnp xzr, x29, [x0]
+ sttnp xzr, x29, [x0, #-8]
+ sttnp xzr, x29, [sp]
+ sttnp xzr, x29, [sp, #-8]
+
+ sttnp q0, q2, [x0]
+ sttnp q0, q2, [x0, #-16]
+ sttnp q0, q2, [sp]
+ sttnp q0, q2, [sp, #-16]
+ sttnp q0, q31, [x0]
+ sttnp q0, q31, [x0, #-16]
+ sttnp q0, q31, [sp]
+ sttnp q0, q31, [sp, #-16]
+ sttnp q31, q0, [x0]
+ sttnp q31, q0, [x0, #-16]
+ sttnp q31, q0, [sp]
+ sttnp q31, q0, [sp, #-16]
+ sttnp q31, q29, [x0]
+ sttnp q31, q29, [x0, #-16]
+ sttnp q31, q29, [sp]
+ sttnp q31, q29, [sp, #-16]
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index dfe3f05820a..1d83b47ec88 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -181,6 +181,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_THE,
/* LSE128. */
AARCH64_FEATURE_LSE128,
+ /* LSUI - Unprivileged Load Store. */
+ AARCH64_FEATURE_LSUI,
/* ARMv8.9-A RAS Extensions. */
AARCH64_FEATURE_RASv2,
/* Delegated SError exceptions for EL3. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 8b64eb07067..c614192b5fa 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1311,6 +1311,12 @@
QLF3(X, X, S_D), \
}
+/* e.g. LDTP <Xt1>, <Xt2>, [<Xn|SP>, #<imm>]!. */
+#define QL_LDST_PAIR_X \
+{ \
+ QLF3(X, X, S_D), \
+}
+
/* e.g. STNP <Qt1>, <Qt2>, [<Xn|SP>{, #<imm>}]. */
#define QL_LDST_PAIR_FP \
{ \
@@ -1319,6 +1325,12 @@
QLF3(S_Q, S_Q, S_Q), \
}
+/* e.g. LDTP <Qt1>, <Qt2>, [<Xn|SP>{, #<imm>}]. */
+#define QL_LDST_PAIR_S_Q \
+{ \
+ QLF3(S_Q, S_Q, S_Q), \
+}
+
/* e.g. LD3 {<Vt>.<T>, <Vt2>.<T>, <Vt3>.<T>}, [<Xn|SP>]. */
#define QL_SIMD_LDST \
{ \
@@ -2695,6 +2707,10 @@ static const aarch64_feature_set aarch64_feature_lse =
AARCH64_FEATURE (LSE);
static const aarch64_feature_set aarch64_feature_lse128 =
AARCH64_FEATURES (2, LSE, LSE128);
+static const aarch64_feature_set aarch64_feature_lsui =
+ AARCH64_FEATURE (LSUI);
+static const aarch64_feature_set aarch64_feature_lsui_fp =
+ AARCH64_FEATURES (2, LSUI, FP);
static const aarch64_feature_set aarch64_feature_lor =
AARCH64_FEATURE (LOR);
static const aarch64_feature_set aarch64_feature_rdma =
@@ -2876,6 +2892,8 @@ static const aarch64_feature_set aarch64_feature_sve2p1_sme2p1 =
#define CRC &aarch64_feature_crc
#define LSE &aarch64_feature_lse
#define LSE128 &aarch64_feature_lse128
+#define LSUI &aarch64_feature_lsui
+#define LSUI_FP &aarch64_feature_lsui_fp
#define LOR &aarch64_feature_lor
#define RDMA &aarch64_feature_rdma
#define FP_F16 &aarch64_feature_fp_f16
@@ -2978,6 +2996,10 @@ static const aarch64_feature_set aarch64_feature_sve2p1_sme2p1 =
{ NAME, OPCODE, MASK, CLASS, 0, LSE, OPS, QUALS, FLAGS, 0, 0, NULL }
#define _LSE128_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, 0, LSE128, OPS, QUALS, FLAGS, 0, 0, NULL }
+#define _LSUI_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+ { NAME, OPCODE, MASK, CLASS, 0, LSUI, OPS, QUALS, FLAGS, 0, 0, NULL }
+#define _LSUI_FP_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+ { NAME, OPCODE, MASK, CLASS, 0, LSUI_FP, OPS, QUALS, FLAGS, 0, 0, NULL }
#define _LOR_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, 0, LOR, OPS, QUALS, FLAGS, 0, 0, NULL }
#define RDMA_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
@@ -4545,6 +4567,55 @@ const struct aarch64_opcode aarch64_opcode_table[] =
_LSE128_INSN ("swppa", 0x19a08000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
_LSE128_INSN ("swppal", 0x19e08000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
_LSE128_INSN ("swppl", 0x19608000, 0xffe0fc00, lse128_atomic, OP3 (LSE128_Rt, LSE128_Rt2, ADDR_SIMPLE), QL_X2NIL, 0),
+
+ /* LSUI extension */
+ _LSUI_INSN ("ldtxr", 0x895f7c00, 0xbffffc00, ldstexcl, OP2 (Rt, ADDR_SIMPLE), QL_R1NIL, F_GPRSIZE_IN_Q),
+ _LSUI_INSN ("ldatxr", 0x895ffc00, 0xbffffc00, ldstexcl, OP2 (Rt, ADDR_SIMPLE), QL_R1NIL, F_GPRSIZE_IN_Q),
+ _LSUI_INSN ("sttxr", 0x89007c00, 0xbfe0fc00, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F_GPRSIZE_IN_Q),
+ _LSUI_INSN ("stltxr", 0x8900fc00, 0xbfe0fc00, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F_GPRSIZE_IN_Q),
+ _LSUI_INSN ("cast", 0xc9807c00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ _LSUI_INSN ("casat", 0xc9c07c00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ _LSUI_INSN ("casalt", 0xc9c0fc00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ _LSUI_INSN ("caslt", 0xc980fc00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ _LSUI_INSN ("caspt", 0x49807c00, 0xffe0fc00, lse_atomic, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_X4NIL, 0),
+ _LSUI_INSN ("caspat", 0x49c07c00, 0xffe0fc00, lse_atomic, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_X4NIL, 0),
+ _LSUI_INSN ("caspalt", 0x49c0fc00, 0xffe0fc00, lse_atomic, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_X4NIL, 0),
+ _LSUI_INSN ("casplt", 0x4980fc00, 0xffe0fc00, lse_atomic, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_X4NIL, 0),
+ _LSUI_INSN ("swpt", 0x19208400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("swpta", 0x19a08400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("swptal", 0x19e08400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("swptl", 0x19608400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtadd", 0x19200400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttadd", 0x1920041f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtadda", 0x19a00400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtaddal", 0x19e00400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtaddl", 0x19600400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttaddl", 0x1960041f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtclr", 0x19201400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttclr", 0x1920141f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtclra", 0x19a01400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtclral", 0x19e01400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtclrl", 0x19601400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttclrl", 0x1960141f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtset", 0x19203400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttset", 0x1920341f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtseta", 0x19a03400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtsetal", 0x19e03400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ),
+ _LSUI_INSN ("ldtsetl", 0x19603400, 0xbfe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS),
+ _LSUI_INSN ("sttsetl", 0x1960341f, 0xbfe0fc1f, lse_atomic, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS),
+ _LSUI_INSN ("ldtnp", 0xe8400000, 0xffc00000, ldstnapair_offs, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_LOAD),
+ _LSUI_FP_INSN ("ldtnp", 0xec400000, 0xffc00000, ldstnapair_offs, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_LOAD),
+ _LSUI_INSN ("sttnp", 0xe8000000, 0xffc00000, ldstnapair_offs, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_STORE),
+ _LSUI_FP_INSN ("sttnp", 0xec000000, 0xffc00000, ldstnapair_offs, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_STORE),
+ _LSUI_INSN ("ldtp", 0xe9400000, 0xffc00000, ldstpair_off, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_LOAD),
+ _LSUI_FP_INSN ("ldtp", 0xed400000, 0xffc00000, ldstpair_off, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_LOAD),
+ _LSUI_INSN ("sttp", 0xe9000000, 0xffc00000, ldstpair_off, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_STORE),
+ _LSUI_FP_INSN ("sttp", 0xed000000, 0xffc00000, ldstpair_off, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_STORE),
+ _LSUI_INSN ("ldtp", 0xe8c00000, 0xfec00000, ldstpair_indexed, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_LOAD),
+ _LSUI_FP_INSN ("ldtp", 0xecc00000, 0xfec00000, ldstpair_indexed, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_LOAD),
+ _LSUI_INSN ("sttp", 0xe8800000, 0xfec00000, ldstpair_indexed, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X, F_LDST_STORE),
+ _LSUI_FP_INSN ("sttp", 0xec800000, 0xfec00000, ldstpair_indexed, OP3 (Fd, Fa, ADDR_SIMM7), QL_LDST_PAIR_S_Q, F_LDST_STORE),
+
/* RCPC3 extension. */
RCPC3_INSN ("ldiapp", 0x19400800, 0x3fe0ec00, rcpc3, OP3 (Rt, Rs, RCPC3_ADDR_OPT_POSTIND), QL_R2NIL, F_RCPC3_SIZE),
RCPC3_INSN ("stilp", 0x19000800, 0x3fe0ec00, rcpc3, OP3 (Rt, Rs, RCPC3_ADDR_OPT_PREIND_WB), QL_R2NIL, F_RCPC3_SIZE),
--
2.45.2
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