[PATCH] x86: Add CpuGMISM2 and CpuGMICCS

[Mayshao-oc]

> On 14.01.2025 07:46, Mayshao-oc wrote:
> >          There are separate CPUID feature bits for SM2 and CCS instructions.
> > CCS includes SM3 and SM4 instructions. This patch adds CpuGMISM2 and 
> > CpuGMICCS to replace CpuGMI on corresponding instructions.
> 
> Mechanically the patch okay, yet I wonder about the names chosen: Are "GMISM2"
> and "GMICCS" how your doc is going to talk about these features?
I got the answer from my colleague. CCS is the acronym of chinese cipher system. 
We develop SM3, SM4 at first and name the cpu feature bit as CCS, then develop the SM2, and name it as SM2.
If its ok, I appreciate you could commit on my behalf.
> 
> Irrespective of the answer, I think it would be nice if the description said what "CCS" actually stands for; it surely isn't "Carbon Capture & Storage".
> 
> Jan

BR
MayShao