[PATCH] x86: have .insn correctly consider AVX10.2's 256-bit embedded rounding

[Jan Beulich]

Deriving operand size may no longer assume 512-bit vector size when
embedded rounding is in use. In fact it was apparently wrong to do so
in the first place, as that's not correct for scalar insns. Drop the
rounding type check altogether; we fall back to EVEX.LIG when no
suitable operand was specified anyway, later in the function (and, btw,
similarly for VEX encodings).
---
Testcase to be the one from "x86: Ignore rounding for vcvt[,u]si2sd
under r32 and vcvt[,u]dq2pd instead of reporting bad", with vector size
zapped from the input.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -13923,8 +13923,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
 	{
 	  if (!i.tm.opcode_modifier.evex)
 	    {
-	      /* Do _not_ consider AVX512VL here.  */
-	      if (i.rounding.type != rc_none || combined.bitfield.zmmword)
+	      /* Do _not_ consider AVX512VL / AVX10.2 here.  */
+	      if (combined.bitfield.zmmword)
 	        i.tm.opcode_modifier.evex = EVEX512;
 	      else if (combined.bitfield.ymmword)
 	        i.tm.opcode_modifier.evex = EVEX256;