[PATCH] x86: Add CpuGMISM2 and CpuGMICCS

[Jiang, Haochen]

> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, January 15, 2025 10:40 PM
> 
> On 14.01.2025 07:46, Mayshao-oc wrote:
> >          There are separate CPUID feature bits for SM2 and CCS instructions.
> > CCS includes SM3 and SM4 instructions. This patch adds CpuGMISM2 and
> > CpuGMICCS to replace CpuGMI on corresponding instructions.
> 
> Mechanically the patch okay, yet I wonder about the names chosen: Are
> "GMISM2"
> and "GMICCS" how your doc is going to talk about these features?
> 
> Irrespective of the answer, I think it would be nice if the description said what
> "CCS" actually stands for; it surely isn't "Carbon Capture & Storage".
> 

Does CCS stand for Chinese cryptography standards here? I guess so but please
name it explicitly since I get them from multiple sources, both Chinese and English.

Thx,
Haochen