[PATCH RFC v2 1/1] x86: default to not accepting Xeon Phi insns
Jan Beulich
jbeulich@suse.com
Fri Aug 1 13:33:40 GMT 2025
Gcc15 has Xeon Phi support removed. While we don't want to remove
support, require these deprecated insns to be enabled explicitly.
---
RFC: Likely this wants holding back until gcc15 was actually released,
to avoid negatively affecting in particular gcc14. Question is
whether just the release of gcc15 is enough, or whether we want
people to be able to build/use gcc14 with newer binutils as well,
e.g. until that branch is retired.
Seeing the various *ig*-intel.d that needed adjustment, I actually
question their value. Checking this once (e.g. for AVX512F) ought to be
enough to be certain the intended behavior is there. We could down the
number of tests by 8 or more this way.
---
v2: Also cover PREFETCHWT1. Re-base over the dropping of
*avx512er-rcig*-intel tests.
--- a/gas/testsuite/gas/i386/avx512_4fmaps.d
+++ b/gas/testsuite/gas/i386/avx512_4fmaps.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4fmaps
#objdump: -dw
#name: i386 AVX512/4FMAPS insns
#source: avx512_4fmaps.s
--- a/gas/testsuite/gas/i386/avx512_4fmaps-intel.d
+++ b/gas/testsuite/gas/i386/avx512_4fmaps-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4fmaps
#objdump: -dw -Mintel
#name: i386 AVX512/4FMAPS insns (Intel disassembly)
#source: avx512_4fmaps.s
--- a/gas/testsuite/gas/i386/avx512_4fmaps-warn.s
+++ b/gas/testsuite/gas/i386/avx512_4fmaps-warn.s
@@ -1,6 +1,6 @@
# Check warnings for invalid usage of register group
-
-.text
+ .arch .avx512_4fmaps
+ .text
v4fmaddps (%eax), %zmm0, %zmm6
v4fmaddps (%eax), %zmm1, %zmm6
v4fmaddps (%eax), %zmm2, %zmm6
--- a/gas/testsuite/gas/i386/avx512_4vnniw.d
+++ b/gas/testsuite/gas/i386/avx512_4vnniw.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4vnniw
#objdump: -dw
#name: i386 AVX512/4VNNIW insns
#source: avx512_4vnniw.s
--- a/gas/testsuite/gas/i386/avx512_4vnniw-intel.d
+++ b/gas/testsuite/gas/i386/avx512_4vnniw-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4vnniw
#objdump: -dw -Mintel
#name: i386 AVX512/4VNNIW insns (Intel disassembly)
#source: avx512_4vnniw.s
--- a/gas/testsuite/gas/i386/avx512_4vnniw-warn.s
+++ b/gas/testsuite/gas/i386/avx512_4vnniw-warn.s
@@ -1,5 +1,5 @@
# Check warnings for invalid usage of register group
-
+ .arch .avx512_4vnniw
.text
vp4dpwssd (%eax), %zmm0, %zmm6
vp4dpwssd (%eax), %zmm1, %zmm6
--- a/gas/testsuite/gas/i386/avx512er-intel.d
+++ b/gas/testsuite/gas/i386/avx512er-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512er
#objdump: -dwMintel
#name: i386 AVX512ER insns (Intel disassembly)
#source: avx512er.s
--- a/gas/testsuite/gas/i386/avx512er-rcigrd.d
+++ b/gas/testsuite/gas/i386/avx512er-rcigrd.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rd
+#as: -march=+avx512er -mevexrcig=rd
#objdump: -dw
#name: i386 AVX512ER rcig insns
#source: avx512er-rcig.s
--- a/gas/testsuite/gas/i386/avx512er-rcigrne.d
+++ b/gas/testsuite/gas/i386/avx512er-rcigrne.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rne
+#as: -march=+avx512er -mevexrcig=rne
#objdump: -dw
#name: i386 AVX512ER rcig insns
#source: avx512er-rcig.s
--- a/gas/testsuite/gas/i386/avx512er-rcigru.d
+++ b/gas/testsuite/gas/i386/avx512er-rcigru.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=ru
+#as: -march=+avx512er -mevexrcig=ru
#objdump: -dw
#name: i386 AVX512ER rcig insns
#source: avx512er-rcig.s
--- a/gas/testsuite/gas/i386/avx512er-rcigrz.d
+++ b/gas/testsuite/gas/i386/avx512er-rcigrz.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rz
+#as: -march=+avx512er -mevexrcig=rz
#objdump: -dw
#name: i386 AVX512ER rcig insns
#source: avx512er-rcig.s
--- a/gas/testsuite/gas/i386/avx512er.d
+++ b/gas/testsuite/gas/i386/avx512er.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512er
#objdump: -dw
#name: i386 AVX512ER insns
--- a/gas/testsuite/gas/i386/avx512pf.d
+++ b/gas/testsuite/gas/i386/avx512pf.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512pf
#objdump: -dw
#name: i386 AVX512PF insns
--- a/gas/testsuite/gas/i386/avx512pf-intel.d
+++ b/gas/testsuite/gas/i386/avx512pf-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512pf
#objdump: -dwMintel
#name: i386 AVX512PF insns (Intel disassembly)
#source: avx512pf.s
--- a/gas/testsuite/gas/i386/evex-lig256.d
+++ b/gas/testsuite/gas/i386/evex-lig256.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=256
+#as: -march=+avx512er -mevexlig=256
#objdump: -dw
#name: i386 AVX512 lig256 insns
#source: evex-lig.s
--- a/gas/testsuite/gas/i386/evex-lig256-intel.d
+++ b/gas/testsuite/gas/i386/evex-lig256-intel.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=256
+#as: -march=+avx512er -mevexlig=256
#objdump: -dwMintel
#name: i386 AVX512 lig256 insns (Intel disassembly)
#source: evex-lig.s
--- a/gas/testsuite/gas/i386/evex-lig512.d
+++ b/gas/testsuite/gas/i386/evex-lig512.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=512
+#as: -march=+avx512er -mevexlig=512
#objdump: -dw
#name: i386 AVX512 lig512 insns
#source: evex-lig.s
--- a/gas/testsuite/gas/i386/evex-lig512-intel.d
+++ b/gas/testsuite/gas/i386/evex-lig512-intel.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=512
+#as: -march=+avx512er -mevexlig=512
#objdump: -dwMintel
#name: i386 AVX512 lig512 insns (Intel disassembly)
#source: evex-lig.s
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -302,7 +302,7 @@ if [gas_32_check] then {
run_dump_test "sse2avx"
run_dump_test "unaligned-vector-move"
run_list_test "inval-avx" "-al"
- run_list_test "inval-avx512f" "-al"
+ run_list_test "inval-avx512f" "-al -march=+avx512pf"
run_list_test "inval-avx512vl" "-al"
run_dump_test "sse-check"
run_dump_test "sse-check-none"
--- a/gas/testsuite/gas/i386/noavx512-1.l
+++ b/gas/testsuite/gas/i386/noavx512-1.l
@@ -11,11 +11,9 @@
.*:14: Error: .*not supported.*
.*:15: Error: .*not supported.*
.*:16: Error: .*not supported.*
-.*:17: Error: .*not supported.*
.*:21: Error: .*operand.*mismatch.*
.*:22: Error: .*unsupported masking.*
.*:23: Error: .*unsupported masking.*
-.*:24: Error: .*not supported.*
.*:25: Error: .*not supported.*
.*:26: Error: .*not supported.*
.*:27: Error: .*not supported.*
@@ -28,14 +26,12 @@
.*:14: Error: .*not supported.*
.*:15: Error: .*not supported.*
.*:16: Error: .*not supported.*
-.*:17: Error: .*not supported.*
.*:18: Error: .*bad register name.*
.*:19: Error: .*unknown vector operation.*
.*:20: Error: .*unknown vector operation.*
.*:21: Error: .*bad register name.*
.*:22: Error: .*unknown vector operation.*
.*:23: Error: .*unknown vector operation.*
-.*:24: Error: .*not supported.*
.*:25: Error: .*not supported.*
.*:26: Error: .*not supported.*
.*:27: Error: .*not supported.*
@@ -48,14 +44,12 @@
.*:14: Error: .*not supported.*
.*:15: Error: .*not supported.*
.*:16: Error: .*not supported.*
-.*:17: Error: .*not supported.*
.*:18: Error: .*bad register name.*
.*:19: Error: .*unknown vector operation.*
.*:20: Error: .*unknown vector operation.*
.*:21: Error: .*bad register name.*
.*:22: Error: .*unknown vector operation.*
.*:23: Error: .*unknown vector operation.*
-.*:24: Error: .*not supported.*
.*:25: Error: .*not supported.*
.*:26: Error: .*not supported.*
.*:27: Error: .*not supported.*
@@ -87,8 +81,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -101,9 +94,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
@@ -128,8 +119,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -142,9 +132,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %ymm4,%ymm5,%ymm6\{%k7\}
@@ -166,8 +154,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -180,9 +167,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
@@ -207,8 +192,7 @@
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -221,52 +205,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2552F > vpermb %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-#...
-[ ]*[0-9]+[ ]+> \.arch default
-[ ]*[0-9]+[ ]+> \.arch \.noavx512er
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vpabsb %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D0F > vpabsb %xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D2F > vpabsb %ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D48 > vpconflictd %zmm5,%zmm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D08 > vpconflictd %xmm5,%xmm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D28 > vpconflictd %ymm5,%ymm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD4F > vcvtpd2qq \(%ecx\),%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD0F > vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+> vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D52F > vaddpd %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D54F > vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D50F > vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
@@ -294,8 +233,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -305,51 +243,7 @@
[ ]*[0-9]+[ ]+> vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2552F > vpermb %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+8DF4
-#...
-[ ]*[0-9]+[ ]+> \.arch default
-[ ]*[0-9]+[ ]+> \.arch \.noavx512pf
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vpabsb %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D0F > vpabsb %xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D2F > vpabsb %ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+1CF5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D48 > vpconflictd %zmm5,%zmm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D08 > vpconflictd %xmm5,%xmm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D28 > vpconflictd %ymm5,%ymm6
-[ ]*[0-9]+[ ]+C4F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD4F > vcvtpd2qq \(%ecx\),%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD0F > vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F1D52F > vaddpd %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+58F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D54F > vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D50F > vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+> vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
@@ -377,8 +271,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -391,9 +284,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %ymm4,%ymm5,%ymm6\{%k7\}
@@ -409,14 +300,14 @@
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+> vexp2ps %zmm5,%zmm6\{%k7\}
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vaddpd %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+> vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %ymm4,%ymm5,%ymm6\{%k7\}
@@ -432,14 +323,14 @@
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+> vexp2ps %zmm5,%zmm6\{%k7\}
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vaddpd %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+> vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
+[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+> vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpermb %ymm4,%ymm5,%ymm6\{%k7\}
--- a/gas/testsuite/gas/i386/noavx512-1.s
+++ b/gas/testsuite/gas/i386/noavx512-1.s
@@ -1,7 +1,7 @@
# Test .arch .noavx512XX
.text
- .irp isa, default, .noavx512bw, .noavx512cd, .noavx512dq, .noavx512er, .noavx512ifma, .noavx512pf, .noavx512vbmi, .noavx512f, .noavx10.1
+ .irp isa, default, .noavx512bw, .noavx512cd, .noavx512dq, .noavx512ifma, .noavx512vbmi, .noavx512f, .noavx10.1
.arch default
.arch \isa
@@ -14,14 +14,14 @@
vcvtpd2qq (%ecx), %zmm6{%k7} # AVX512DQ
vcvtpd2qq (%ecx), %xmm6{%k7} # AVX512DQ + AVX512VL
vcvtpd2qq (%ecx), %ymm6{%k7} # AVX512DQ + AVX512VL
- vexp2ps %zmm5, %zmm6{%k7} # AVX512ER
+
vaddpd %zmm4, %zmm5, %zmm6{%k7} # AVX512F
vaddpd %xmm4, %xmm5, %xmm6{%k7} # AVX512F + AVX512VL
vaddpd %ymm4, %ymm5, %ymm6{%k7} # AVX512F + AVX512VL
vpmadd52luq %zmm4, %zmm5, %zmm6{%k7} # AVX512IFMA
vpmadd52luq %xmm4, %xmm5, %xmm6{%k7} # AVX512IFMA + AVX512VL
vpmadd52luq %ymm4, %ymm5, %ymm6{%k7} # AVX512IFMA + AVX512VL
- vgatherpf0dpd 23(%ebp,%ymm7,8){%k1} # AVX512PF
+
vpermb %zmm4, %zmm5, %zmm6{%k7} # AVX512VBMI
vpermb %xmm4, %xmm5, %xmm6{%k7} # AVX512VBMI + AVX512VL
vpermb %ymm4, %ymm5, %ymm6{%k7} # AVX512VBMI + AVX512VL
--- a/gas/testsuite/gas/i386/noavx512-2.l
+++ b/gas/testsuite/gas/i386/noavx512-2.l
@@ -1,11 +1,13 @@
.*: Assembler messages:
+.*:17: Error: .*not supported.*
+.*:24: Error: .*not supported.*
.*:8: Error: .*bad register name `%zmm.*
.*:11: Error: .*bad register name `%zmm.*
.*:14: Error: .*bad register name `%zmm.*
-.*:17: Error: .*bad register name `%zmm.*
+.*:17: Error: .*
.*:18: Error: .*bad register name `%zmm.*
.*:21: Error: .*bad register name `%zmm.*
-.*:24: Error: .*vector size.*
+.*:24: Error: .*
.*:25: Error: .*bad register name `%zmm.*
.*:8: Error: .*bad register name `%zmm.*
.*:10: Error: .*bad register name `%ymm.*
@@ -13,7 +15,7 @@
.*:13: Error: .*bad register name `%ymm.*
.*:14: Error: .*bad register name `%zmm.*
.*:16: Error: .*bad register name `%ymm.*
-.*:17: Error: .*bad register name `%zmm.*
+.*:17: Error: .*
.*:18: Error: .*bad register name `%zmm.*
.*:20: Error: .*bad register name `%ymm.*
.*:21: Error: .*bad register name `%zmm.*
@@ -27,10 +29,12 @@
.*:13: Error: .*operand size mismatch.*
.*:15: Error: .*operand size mismatch.*
.*:16: Error: .*operand size mismatch.*
+.*:17: Error: .*not supported.*
.*:19: Error: .*unsupported masking.*
.*:20: Error: .*unsupported masking.*
.*:22: Error: .*operand size mismatch.*
.*:23: Error: .*operand size mismatch.*
+.*:24: Error: .*not supported.*
.*:26: Error: .*operand size mismatch.*
.*:27: Error: .*operand size mismatch.*
#...
@@ -61,8 +65,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+\?\?\?\? 62F1FD2F > vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
[ ]*[0-9]+[ ]+7B31
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> vexp2ps %zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D50F > vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -75,9 +78,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2D52F > vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
[ ]*[0-9]+[ ]+B4F4
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+\?\?\?\? 62F2550F > vpermb %xmm4,%xmm5,%xmm6\{%k7\}
@@ -162,8 +163,7 @@
[ ]*[0-9]+[ ]+7B31
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vcvtpd2qq \(%ecx\),%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+\?\?\?\? 62F27D4F > vexp2ps %zmm5,%zmm6\{%k7\}
-[ ]*[0-9]+[ ]+C8F5
+[ ]*[0-9]+[ ]+> vexp2ps %zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+\?\?\?\? 62F1D54F > vaddpd %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+58F4
[ ]*[0-9]+[ ]+> vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
@@ -172,9 +172,7 @@
[ ]*[0-9]+[ ]+B4F4
[ ]*[0-9]+[ ]+> vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[0-9]+[ ]+> vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}
-[ ]*[0-9]+[ ]+\?\?\?\? 62F2FD49 > vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
-[ ]*[0-9]+[ ]+C68CFD17 *
-[ ]*[0-9]+[ ]+000000
+[ ]*[0-9]+[ ]+> vgatherpf0dpd 23\(%ebp,%ymm7,8\)\{%k1\}
[ ]*[0-9]+[ ]+\?\?\?\? 62F2554F > vpermb %zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[0-9]+[ ]+8DF4
[ ]*[0-9]+[ ]+> vpermb %xmm4,%xmm5,%xmm6\{%k7\}
--- a/gas/testsuite/gas/i386/prefetchwt1.d
+++ b/gas/testsuite/gas/i386/prefetchwt1.d
@@ -1,3 +1,4 @@
+#as: -march=+prefetchwt1
#objdump: -dw
#name: i386 PREFETCHWT1 insns
--- a/gas/testsuite/gas/i386/prefetchwt1-intel.d
+++ b/gas/testsuite/gas/i386/prefetchwt1-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+prefetchwt1
#objdump: -dwMintel
#name: i386 PREFETCHWT1 insns (Intel disassembly)
#source: prefetchwt1.s
--- a/gas/testsuite/gas/i386/property-13.d
+++ b/gas/testsuite/gas/i386/property-13.d
@@ -1,5 +1,5 @@
#name: i386 property 13
-#as: -mx86-used-note=yes --generate-missing-build-notes=no
+#as: -march=+avx512pf -mx86-used-note=yes --generate-missing-build-notes=no
#readelf: -n
Displaying notes found in: .note.gnu.property
--- a/gas/testsuite/gas/i386/property-v4fmaddps.d
+++ b/gas/testsuite/gas/i386/property-v4fmaddps.d
@@ -1,5 +1,5 @@
#name: i386 property v4fmaddps
-#as: -mx86-used-note=yes --generate-missing-build-notes=no
+#as: -march=+avx512_4fmaps -mx86-used-note=yes --generate-missing-build-notes=no
#readelf: -n
Displaying notes found in: .note.gnu.property
--- a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4fmaps
#objdump: -dw
#name: x86_64 AVX512/4FMAPS insns
#source: x86-64-avx512_4fmaps.s
--- a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4fmaps
#objdump: -dw -Mintel
#name: x86_64 AVX512/4FMAPS insns (Intel disassembly)
#source: x86-64-avx512_4fmaps.s
--- a/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s
@@ -1,6 +1,6 @@
# Check warnings for invalid usage of register group
-
-.text
+ .arch .avx512_4fmaps
+ .text
v4fmaddps (%rax), %zmm0, %zmm10
v4fmaddps (%rax), %zmm1, %zmm10
v4fmaddps (%rax), %zmm2, %zmm10
--- a/gas/testsuite/gas/i386/x86-64-avx512_4vnniw.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512_4vnniw.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4vnniw
#objdump: -dw
#name: x86_64 AVX512/4VNNIW insns
#source: x86-64-avx512_4vnniw.s
--- a/gas/testsuite/gas/i386/x86-64-avx512_4vnniw-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512_4vnniw-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512_4vnniw
#objdump: -dw -Mintel
#name: x86_64 AVX512/4VNNIW insns (Intel disassembly)
#source: x86-64-avx512_4vnniw.s
--- a/gas/testsuite/gas/i386/x86-64-avx512er.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512er
#objdump: -dw
#name: x86_64 AVX512ER insns
--- a/gas/testsuite/gas/i386/x86-64-avx512er-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512er
#objdump: -dwMintel
#name: x86_64 AVX512ER insns (Intel disassembly)
#source: x86-64-avx512er.s
--- a/gas/testsuite/gas/i386/x86-64-avx512er-rcigrd.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er-rcigrd.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rd
+#as: -march=+avx512er -mevexrcig=rd
#objdump: -dw
#name: x86_64 AVX512ER rcig insns
#source: x86-64-avx512er-rcig.s
--- a/gas/testsuite/gas/i386/x86-64-avx512er-rcigrne.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er-rcigrne.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rne
+#as: -march=+avx512er -mevexrcig=rne
#objdump: -dw
#name: x86_64 AVX512ER rcig insns
#source: x86-64-avx512er-rcig.s
--- a/gas/testsuite/gas/i386/x86-64-avx512er-rcigru.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er-rcigru.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=ru
+#as: -march=+avx512er -mevexrcig=ru
#objdump: -dw
#name: x86_64 AVX512ER rcig insns
#source: x86-64-avx512er-rcig.s
--- a/gas/testsuite/gas/i386/x86-64-avx512er-rcigrz.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512er-rcigrz.d
@@ -1,4 +1,4 @@
-#as: -mevexrcig=rz
+#as: -march=+avx512er -mevexrcig=rz
#objdump: -dw
#name: x86_64 AVX512ER rcig insns
#source: x86-64-avx512er-rcig.s
--- a/gas/testsuite/gas/i386/x86-64-avx512pf.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512pf.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512pf
#objdump: -dw
#name: x86_64 AVX512PF insns
--- a/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+avx512pf
#objdump: -dwMintel
#name: x86_64 AVX512PF insns (Intel disassembly)
#source: x86-64-avx512pf.s
--- a/gas/testsuite/gas/i386/x86-64-evex-lig256.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-lig256.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=256
+#as: -march=+avx512er -mevexlig=256
#objdump: -dw
#name: x86_64 AVX512 lig256 insns
#source: x86-64-evex-lig.s
--- a/gas/testsuite/gas/i386/x86-64-evex-lig256-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-lig256-intel.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=256
+#as: -march=+avx512er -mevexlig=256
#objdump: -dwMintel
#name: x86_64 AVX512 lig256 insns (Intel disassembly)
#source: x86-64-evex-lig.s
--- a/gas/testsuite/gas/i386/x86-64-evex-lig512.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-lig512.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=512
+#as: -march=+avx512er -mevexlig=512
#objdump: -dw
#name: x86_64 AVX512 lig512 insns
#source: x86-64-evex-lig.s
--- a/gas/testsuite/gas/i386/x86-64-evex-lig512-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-lig512-intel.d
@@ -1,4 +1,4 @@
-#as: -mevexlig=512
+#as: -march=+avx512er -mevexlig=512
#objdump: -dwMintel
#name: x86_64 AVX512 lig512 insns (Intel disassembly)
#source: x86-64-evex-lig.s
--- a/gas/testsuite/gas/i386/x86-64-prefetchwt1.d
+++ b/gas/testsuite/gas/i386/x86-64-prefetchwt1.d
@@ -1,3 +1,4 @@
+#as: -march=+prefetchwt1
#objdump: -dw
#name: x86_64 PREFETCHWT1 insns
--- a/gas/testsuite/gas/i386/x86-64-prefetchwt1-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-prefetchwt1-intel.d
@@ -1,3 +1,4 @@
+#as: -march=+prefetchwt1
#objdump: -dwMintel
#name: x86_64 PREFETCHWT1 insns (Intel disassembly)
#source: x86-64-prefetchwt1.s
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -47,7 +47,7 @@ typedef struct dependency
static const dependency isa_dependencies[] =
{
{ "UNKNOWN",
- "~(IAMCU|MPX)" },
+ "~(IAMCU|MPX|AVX512ER|AVX512PF|AVX512_4FMAPS|AVX512_4VNNIW|PREFETCHWT1)" },
{ "GENERIC32",
"386" },
{ "GENERIC64",
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