[PATCH 41/43] aarch64: Mark clearbhb as a pseudo instruction

Alice Carlotti alice.carlotti@arm.com
Mon Apr 21 21:28:45 GMT 2025


This was an early name for the clrbhb hint instruction.  Some software
was written with the old name before it was renamed, so we support it
for assembly but should never use it in disassembly.

This patch has no functional change, because we already pick (by
default) the last matching alias in the opcode table, and clrbhb is
listed later than clearbhb.


diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index d298a165ad1bb7294a926966363cdce7d4ac7b44..ed0a02b3d65785c2ad3bfb1569138e9a3747b91c 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -4607,7 +4607,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
   CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
   CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
   CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
-  CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
+  CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS | F_PSEUDO),
   CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
   CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
   XS_INSN ("dsb", 0xd503323f, 0xfffff3ff, ic_system, OP1 (BARRIER_DSB_NXS), {}, F_HAS_ALIAS),



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