[PATCH 1/2] LoongArch: Support LA32R aliases rdcnt{vl,vh,id}.w

[Lulu Cai]

Test case fixed and pushed.

On 4/11/25 9:48 AM, Lulu Cai wrote:
> On 4/2/25 2:47 PM, Lulu Cai wrote:
>> On 3/23/25 5:30 PM, WANG Xuerui wrote:
>>> From: WANG Xuerui <git@xen0n.name>
>>>
>>> These LA32R instructions are in fact special cases of the LA32S/LA64
>>> rdtime{l,h}.w (with only one output operand instead of two, the other
>>> one being forced to $zero), but are named differently in the LA32R
>>> ISA manual nevertheless.
>>>
>>> As the LA32R names are more memorable to a degree (especially for those
>>> having difficulties remembering which operand corresponds to the node
>>> ID), support them by making them aliases of the corresponding 
>>> LA32S/LA64
>>> instruction respectively, and make them render as such in disassembly.
>>>
>>> Signed-off-by: WANG Xuerui <git@xen0n.name>
>>> ---
>>>   gas/testsuite/gas/loongarch/fix_op.d        | 3 +++
>>>   gas/testsuite/gas/loongarch/fix_op.s        | 5 +++++
>>>   gas/testsuite/gas/loongarch/insn_alias_32.d | 3 +++
>>>   gas/testsuite/gas/loongarch/insn_alias_32.s | 5 +++++
>>>   opcodes/loongarch-opc.c                     | 6 ++++++
>>>   5 files changed, 22 insertions(+)
>>>
>>> diff --git a/gas/testsuite/gas/loongarch/fix_op.d 
>>> b/gas/testsuite/gas/loongarch/fix_op.d
>>> index 7125f2e3309..05e7403d15c 100644
>>> --- a/gas/testsuite/gas/loongarch/fix_op.d
>>> +++ b/gas/testsuite/gas/loongarch/fix_op.d
>>> @@ -132,3 +132,6 @@ Disassembly of section .text:
>>>   [     ]+1e8:[     ]+00df04a4 [     ]+bstrpick.d[     ]+[ ]+\$a0, 
>>> \$a1, 0x1f, 0x1
>>>   [     ]+1ec:[     ]+00e000a4 [     ]+bstrpick.d[     ]+[ ]+\$a0, 
>>> \$a1, 0x20, 0x0
>>>   [     ]+1f0:[     ]+00ff00a4 [     ]+bstrpick.d[     ]+[ ]+\$a0, 
>>> \$a1, 0x3f, 0x0
>>> +[     ]+1f4:[     ]+00006004 [     ]+rdcntvl.w[     ]+[ ]+\$a0
>>> +[     ]+1f8:[     ]+000060a0 [     ]+rdcntid.w[     ]+[ ]+\$a1
>>> +[     ]+1fc:[     ]+00006404 [     ]+rdcntvh.w[     ]+[ ]+\$a0
>>> diff --git a/gas/testsuite/gas/loongarch/fix_op.s 
>>> b/gas/testsuite/gas/loongarch/fix_op.s
>>> index d0523f959fb..876913bfdfb 100644
>>> --- a/gas/testsuite/gas/loongarch/fix_op.s
>>> +++ b/gas/testsuite/gas/loongarch/fix_op.s
>>> @@ -123,3 +123,8 @@ bstrpick.d  $r4,$r5,0,0
>>>   bstrpick.d  $r4,$r5,31,1
>>>   bstrpick.d  $r4,$r5,32,0
>>>   bstrpick.d  $r4,$r5,63,0
>>> +
>>> +# LA32R aliases
>>> +rdcntvl.w  $r4
>>> +rdcntid.w  $r5
>>> +rdcntvh.w  $r4
>>> diff --git a/gas/testsuite/gas/loongarch/insn_alias_32.d 
>>> b/gas/testsuite/gas/loongarch/insn_alias_32.d
>>> index 753eae7a8f9..d0e0679541e 100644
>>> --- a/gas/testsuite/gas/loongarch/insn_alias_32.d
>>> +++ b/gas/testsuite/gas/loongarch/insn_alias_32.d
>>> @@ -17,3 +17,6 @@ Disassembly of section .text:
>>>     18:    60000080     blt             \$a0, \$zero, 0    # 18 
>>> <L1\+0x18>
>>>     1c:    64000080     bge             \$a0, \$zero, 0    # 1c 
>>> <L1\+0x1c>
>>>     20:    64000004     bge             \$zero, \$a0, 0    # 20 
>>> <L1\+0x20>
>>> +  24:    00006004     rdtimel.w       $a0, $zero
>>> +  28:    000060a0     rdtimel.w       $zero, $a1
>>> +  2c:    00006406     rdtimeh.w       $a2, $zero
>>
>> A '\' is required before '$'.
>>
> ping.
>