[PATCH] aarch64: Support for FEAT_PCDPHINT

[Jan Beulich]

On 04.04.2025 23:10, Ezra.Sitorus@arm.com wrote:
> From: Ezra Sitorus <ezra.sitorus@arm.com>
> 
> FEAT_PCDPHINT - Producer-consumer data placement hints - is an optional
> ISA extension that provides hint instructions to indicate:
> - a store in the current execution thread is generating data at a specific
> location, which a thread of execution on one or more other observers is
> waiting on.
> - the thread of execution on the current PE will read a location that may not
> yet have been written with the value to be consumed.
> 
> This extension introduces:
> - STSHH, a hint instruction, with operands (policies) keep and strm
> - PRFM *IR*, a new prefetch memory operand.
> 
> Details of FEAT_PCPHINT can be found here:
> https://developer.arm.com/documentation/109697/2024_12/Feature-descriptions/The-Armv9-6-architecture-extension
> https://developer.arm.com/documentation/ddi0602/2024-12/Base-Instructions/STSHH--Store-shared-hint-?lang=en
> https://developer.arm.com/documentation/ddi0602/2024-12/Base-Instructions/PRFM--immediate---Prefetch-memory--immediate--?lang=en
> ---
> 
> Regression tested on aarch64-none-linux-gnu. I do not have commit rights yet,
> can somebody commit it if it looks ok?

Just a couple of purely style nits:

> @@ -8150,6 +8152,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
>  	    goto failure;
>  	  break;
>  
> +	case AARCH64_OPND_STSHH_POLICY:
> +	  if (!parse_hint_opt (opcode->name, &str, &(info->hint_option)))
> +		    goto failure;
> +		  break;

Indentation is too deep here for the latter two lines.

> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/pcdphint-bad.s
> @@ -0,0 +1,5 @@
> +stshh kee
> +stshh strmm
> +stshh
> +
> +prfm ir1234

Insns better don't start in the first column of a line. Only labels ought
to start like this.

> --- a/include/opcode/aarch64.h
> +++ b/include/opcode/aarch64.h
> @@ -688,6 +688,7 @@ enum aarch64_opnd
>    AARCH64_OPND_BARRIER_PSB,	/* Barrier operand for PSB.  */
>    AARCH64_OPND_BARRIER_GCSB,	/* Barrier operand for GCSB.  */
>    AARCH64_OPND_BTI_TARGET,	/* BTI {<target>}.  */
> +  AARCH64_OPND_STSHH_POLICY,	/* STSHH {<policy>}. */
>    AARCH64_OPND_BRBOP,		/* BRB operation IALL or INJ in bit 5.  */
>    AARCH64_OPND_Rt_IN_SYS_ALIASES,	/* Defaulted and omitted Rt used in SYS aliases such as brb.  */
>    AARCH64_OPND_LSE128_Rt,	/* LSE128 <Xt1>.  */
> @@ -1770,6 +1771,8 @@ struct aarch64_inst
>  #define HINT_OPD_C	0x22
>  #define HINT_OPD_J	0x24
>  #define HINT_OPD_JC	0x26
> +#define HINT_OPD_KEEP 0x30
> +#define HINT_OPD_STRM 0x31
>  #define HINT_OPD_NULL	0x00

Padding apparently wants to be done with a hard tab here ...

> --- a/opcodes/aarch64-opc.c
> +++ b/opcodes/aarch64-opc.c
> @@ -596,6 +596,8 @@ const struct aarch64_name_value_pair aarch64_hint_options[] =
>    { "c",	HINT_OPD_C },		/* BTI C.  */
>    { "j",	HINT_OPD_J },		/* BTI J.  */
>    { "jc",	HINT_OPD_JC },		/* BTI JC.  */
> +  { "keep",	HINT_OPD_KEEP }, /* STSHH KEEP */
> +  { "strm",	HINT_OPD_STRM }, /* STSHH STRM */

... and here.

> @@ -5071,6 +5073,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
>  		  style_sub_mnem (styler, opnd->hint_option->name));
>        break;
>  
> +    case AARCH64_OPND_STSHH_POLICY:
> +    snprintf (buf, size, "%s", style_sub_mnem (styler, opnd->hint_option->name));
> +    break;

The latter two lines want indenting by one more level.

Jan