[PATCH] x86: move PadLock enumerators

[Jan Beulich]

... to be all in one group. This helps code generation for code like

      || is_cpu (&i.tm, CpuPadLock)
      || is_cpu (&i.tm, CpuPadLockRNG2)
      || is_cpu (&i.tm, CpuPadLockPHE2)
      || is_cpu (&i.tm, CpuPadLockXMODX)

that we have (effectively) twice.

--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -356,11 +356,11 @@ static bitfield cpu_flags[] =
   BITFIELD (3dnow),
   BITFIELD (3dnowA),
   BITFIELD (PadLock),
-  BITFIELD (GMISM2),
-  BITFIELD (GMICCS),
   BITFIELD (PadLockRNG2),
   BITFIELD (PadLockPHE2),
   BITFIELD (PadLockXMODX),
+  BITFIELD (GMISM2),
+  BITFIELD (GMICCS),
   BITFIELD (SVME),
   BITFIELD (VMX),
   BITFIELD (SMX),
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -66,16 +66,16 @@ enum i386_cpu
   CpuSSE3,
   /* VIA PadLock required */
   CpuPadLock,
-  /* Zhaoxin GMI SM2 required */
-  CpuGMISM2,
-  /* Zhaoxin GMI CCS required */
-  CpuGMICCS,
   /* Zhaoxin PadLock RNG2 required */
   CpuPadLockRNG2,
   /* Zhaoxin PadLock PHE2 required */
   CpuPadLockPHE2,
   /* Zhaoxin PadLock XMODX required */
   CpuPadLockXMODX,
+  /* Zhaoxin GMI SM2 required */
+  CpuGMISM2,
+  /* Zhaoxin GMI CCS required */
+  CpuGMICCS,
   /* AMD Secure Virtual Machine Ext-s required */
   CpuSVME,
   /* VMX Instructions required */
@@ -428,11 +428,11 @@ typedef union i386_cpu_flags
       unsigned int cpusse2:1;
       unsigned int cpusse3:1;
       unsigned int cpupadlock:1;
-      unsigned int cpugmism2:1;
-      unsigned int cpugmiccs:1;
       unsigned int cpupadlockrng2:1;
       unsigned int cpupadlockphe2:1;
       unsigned int cpupadlockxmodx:1;
+      unsigned int cpugmism2:1;
+      unsigned int cpugmiccs:1;
       unsigned int cpusvme:1;
       unsigned int cpuvmx:1;
       unsigned int cpusmx:1;