[PATCH v3 2/3] aarch64: ld: add tests for combination of bti and memory-seal

Yury Khrustalev yury.khrustalev@arm.com
Wed Apr 2 13:05:25 GMT 2025


---
 .../protections/bti-and-memory-seal-plt-1-a.d | 45 +++++++++++++++++++
 .../protections/bti-and-memory-seal-plt-1-b.d | 14 ++++++
 2 files changed, 59 insertions(+)
 create mode 100644 ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-a.d
 create mode 100644 ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-b.d

diff --git a/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-a.d b/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-a.d
new file mode 100644
index 00000000000..f8b1c214b2b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-a.d
@@ -0,0 +1,45 @@
+#name: No '-z force-bti' with '-z memory-seal' with feature properties (BTI) forces the generation of BTI PLT (shared)
+#source: bti-plt-1.s
+#source: bti-plt-2.s
+#target: [check_shared_lib_support]
+#as: -mabi=lp64 -defsym __property_bti__=1
+#ld: -shared -z memory-seal -T bti-plt.ld -L./tmpdir -lbti-plt-so
+#objdump: -dr -j .plt
+
+[^:]*: *file format elf64-.*aarch64
+
+Disassembly of section \.plt:
+
+[0-9]+ <\.plt>:
+.*:	d503245f 	bti	c
+.*:	a9bf7bf0 	stp	x16, x30, \[sp, #-16\]!
+.*:	90000090 	adrp	x16, 28000 <_GLOBAL_OFFSET_TABLE_>
+.*:	f9400e11 	ldr	x17, \[x16, #24\]
+.*:	91006210 	add	x16, x16, #0x18
+.*:	d61f0220 	br	x17
+.*:	d503201f 	nop
+.*:	d503201f 	nop
+
+[0-9]+ <.*>:
+.*:	90000090 	adrp	x16, 28000 <_GLOBAL_OFFSET_TABLE_>
+.*:	f9401211 	ldr	x17, \[x16, #32\]
+.*:	91008210 	add	x16, x16, #0x20
+.*:	d61f0220 	br	x17
+
+[0-9]+ <.*>:
+.*:	90000090 	adrp	x16, 28000 <_GLOBAL_OFFSET_TABLE_>
+.*:	f9401611 	ldr	x17, \[x16, #40\]
+.*:	9100a210 	add	x16, x16, #0x28
+.*:	d61f0220 	br	x17
+
+[0-9]+ <.*>:
+.*:	90000090 	adrp	x16, 28000 <_GLOBAL_OFFSET_TABLE_>
+.*:	f9401a11 	ldr	x17, \[x16, #48\]
+.*:	9100c210 	add	x16, x16, #0x30
+.*:	d61f0220 	br	x17
+
+[0-9]+ <.*>:
+.*:	90000090 	adrp	x16, 28000 <_GLOBAL_OFFSET_TABLE_>
+.*:	f9401e11 	ldr	x17, \[x16, #56\]
+.*:	9100e210 	add	x16, x16, #0x38
+.*:	d61f0220 	br	x17
diff --git a/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-b.d b/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-b.d
new file mode 100644
index 00000000000..0dadcc9da5c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/protections/bti-and-memory-seal-plt-1-b.d
@@ -0,0 +1,14 @@
+#name: No '-z force-bti' with '-z memory-seal' all input objects have BTI emits BTI feature (shared)
+#source: bti-plt-1.s
+#source: bti-plt-2.s
+#target: [check_shared_lib_support]
+#as: -mabi=lp64 -defsym __property_bti__=1
+#ld: -z memory-seal -shared -T bti-plt.ld
+#readelf: -n
+
+Displaying notes found in: .note.gnu.property
+[ 	]+Owner[ 	]+Data size[ 	]+Description
+  GNU                  0x00000018	NT_GNU_PROPERTY_TYPE_0
+      Properties: memory seal\s
+\s+AArch64 feature: BTI
+#pass
-- 
2.39.5



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