[PATCH v4] RISC-V: Add Zcmt instructions and csr.

jiawei@iscas.ac.cn jiawei@iscas.ac.cn
Sun Sep 29 03:22:34 GMT 2024


-----原始邮件-----
发件人:"Nelson Chu" <nelson@rivosinc.com>
发送时间:2024-09-24 14:45:12 (星期二)
收件人: Jiawei <jiawei@iscas.ac.cn>
抄送: binutils@sourceware.org, jbeulich@suse.com, kito.cheng@gmail.com, palmer@rivosinc.com, christoph.muellner@vrull.eu
主题: Re: [PATCH v4] RISC-V: Add Zcmt instructions and csr.



Does this patch refer to the spec, https://github.com/riscvarchive/riscv-code-size-reduction/releases?




Yes, it’s. I will mention this in the new version patch.




On Wed, Sep 11, 2024 at 3:39 PM Jiawei <jiawei@iscas.ac.cn> wrote:     
@@ -3914,6 +3921,28 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
                        break;
                      INSERT_OPERAND (SREG2, *ip, regno % 8);
                      continue;
+                   case 'I': /* index operand of cm.jt. The range is from 0 to 31.  */
+                     my_getSmallExpression (imm_expr, imm_reloc, asarg, p);
+                     if (imm_expr->X_op != O_constant
+                         || imm_expr->X_add_number < 0
+                         || imm_expr->X_add_number > 31)
+                       {
+                         as_bad ("bad index value for cm.jt, range: [0, 31]");
+                         break;
+                       }
+                     ip->insn_opcode |= ENCODE_ZCMT_INDEX (imm_expr->X_add_number);
+                     goto rvc_imm_done;
+                   case 'i': /* index operand of cm.jalt. The range is from 32 to 255.  */
+                     my_getSmallExpression (imm_expr, imm_reloc, asarg, p);
+                     if (imm_expr->X_op != O_constant
+                         || imm_expr->X_add_number < 32
+                         || imm_expr->X_add_number > 255)
+                       {
+                         as_bad ("bad index value for cm.jalt, range: [32, 255]");
+                         break;
+                       }
+                     ip->insn_opcode |= ENCODE_ZCMT_INDEX (imm_expr->X_add_number);
+                     goto rvc_imm_done;




Since we already have the range check of the immediate field here, I think we don't need to check them again in the match_cm_jt and match_cm_jalt.  That is - we don't need the match_cm* functions.




Okay, I will update the implement.

 
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 73ee81158ae..5cc5e6e1eb5 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
+/* Zcmt instructions.  */
+#define MATCH_CM_JT 0xa002
+#define MASK_CM_JT 0xff03
+#define MATCH_CM_JALT 0xa002
+#define MASK_CM_JALT 0xfc03



0xfc03 also for MASK_CM_JT?




Thanks for you point it out, will fix in next version.

 
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 8ab138e45ce..ec12f488858 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -61,6 +61,8 @@ struct riscv_private_data
 {
   bfd_vma gp;
   bfd_vma print_addr;
+  bfd_vma jvt_base;
+  bfd_vma jvt_end;




How do these two variables actually work?




They are two index to keep the info in jvt register table.

 
+/* Print table jump index.  */
+
+static bool
+print_jvt_index (disassemble_info *info, unsigned int index)
+{
+  bfd_vma entry_value;
+  bfd_vma memaddr;
+  int status;
+
+  bfd_byte packet[8] = { 0 };
+  struct riscv_private_data *pd = info->private_data;
+
+  memaddr = pd->jvt_base + index * (xlen / 8);
+  status = (*info->read_memory_func) (memaddr, packet, xlen / 8, info);
+  if (status != 0)
+    return false;
+
+  entry_value = xlen == 32 ? bfd_getl32 (packet)
+                           : bfd_getl64 (packet);
+
+  maybe_print_address (pd, 0, entry_value, 0);
+  return true;
+}




How/When/Who to set the value of jvt_base?  Maybe they are in a different patch or code?  If that is so then the code here should be moved to there :-)




You are totally right, it dominated by linker relocation part of patch, I will make it clear up.



Thanks
Nelson
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