[PATCH v3] Support Intel AVX10.2 media instructions

[Jan Beulich]

On 25.09.2024 16:39, Haochen Jiang wrote:
> --- a/opcodes/i386-dis-evex-prefix.h
> +++ b/opcodes/i386-dis-evex-prefix.h
> @@ -231,8 +231,8 @@
>    },
>    /* PREFIX_EVEX_0F3852 */
>    {
> -    { Bad_Opcode },
> -    { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
> +    { "vdpphp%XS",	{ XM, Vex, EXx }, 0 },
> +    { "vdpbf16p%XS",	{ XM, Vex, EXx }, 0 },

Like you have it here, ...

> @@ -309,6 +309,12 @@
>      { Bad_Opcode },
>      { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
>    },
> +  /* PREFIX_EVEX_0F3A42_W_0 */
> +  {
> +    { Bad_Opcode },
> +    { "%XEvmpsadbw",      { XM, Vex, EXx, Ib }, 0 },
> +    { "vdbpsadbw",      { XM, Vex, EXx, Ib }, 0 },

... you want to use tabs for the padding ahead of the inner opening figure
brace. That'll then also address the two opening figure braces not aligning
with one another.

> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3057,11 +3057,15 @@ vpdpwssd<vnni><sat>, 0x6652|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV
>  
>  // {AVX512,AVX}_VNNI instructions end
>  
> +<vnni_vex:int8:int16:attr:reg:mem, $y:_VNNI_INT8:_VNNI_INT16:Vex::, $z:10_2:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>

If this really is needed (contrary to previously outlined plans), it
wants wrapping across 3 lines (just like is done for other long-ish
templates). However, despite you saying something about this in the
description, I don't follow why this is needed. Just to repeat what I
said before:

> +
>  // AVX-VNNI-INT8 instructions.
>  
>  <dpb:pfx, uu:, ss:f2, su:f3>
>  
> -vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
> +vpdpb<dpb>d<vnni_vex><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni_vex:int8>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni_vex:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni_vex:reg>|<vnni_vex:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni_vex:reg>, RegXMM|RegYMM|<vnni_vex:reg> }

The plan was for you to add a single new line below the existing one here
and ...

> @@ -3069,12 +3073,13 @@ vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Sr
>  
>  <dpw:pfx, uu:, us:66, su:f3>
>  
> -vpdpw<dpw>d<sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
> +vpdpw<dpw>d<vnni_vex><sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX<vnni_vex:int16>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni_vex:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni_vex:reg>|<vnni_vex:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni_vex:reg>, RegXMM|RegYMM|<vnni_vex:reg> }

... here. Less code churn, better readability of the result. Templatization
can be quite useful to reduce redundancy, but I'm afraid that templatizing
here reduces redundancy too little (folding just two lines each into one,
when both would be sufficiently dissimilar, and hence redundancy isn't
really a concern) to warrant the relatively complex new template itself.

Jan