[PATCH v2] RISC-V: Add Smrnmi extension csrs.
Jiawei
jiawei@iscas.ac.cn
Tue Sep 24 11:17:53 GMT 2024
在 2024/9/24 12:08, Nelson Chu 写道:
> Thanks. Two minor things as follows. Otherwise it looks good.
>
> Nelson
>
> On Mon, Sep 23, 2024 at 4:36 PM Jiawei <jiawei@iscas.ac.cn> wrote:
>
> This patch support Smrnmi extension[1],
> The csrs address can be find in[2].
>
> [1]
> https://github.com/riscv/riscv-isa-manual/commit/35eb3948bf0b87c83fab5a7238bd68b6211faf62
> [2]
> https://github.com/lily689/Risc-manual/blob/main/src/priv-csrs.adoc
>
>
> [2] probably be
> https://github.com/riscv/riscv-isa-manual/blob/smrnmi-1.0/src/priv-csrs.adoc?
>
> diff --git a/gas/NEWS b/gas/NEWS
> index 24055d2f5e9..ade7f728e95 100644
> --- a/gas/NEWS
> +++ b/gas/NEWS
> @@ -3,6 +3,8 @@
> * Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01) and CORE-V
> (xcvbitmanip,
> xcvsimd) extensions with version 1.0.
>
> +* Add support for RISC-V Smrnmi extension with version 1.0.
> +
>
>
> Can we merge this line into the above news? That is - Add support for
> RISC-V Zcmp (...), Smrnmi and Core-V...
Thanks for your comments, update in new version.
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