[PATCH v4] x86: Add tls check in gas

[Cui, Lili]

> > > +    case BFD_RELOC_X86_64_GOTPC32_TLSDESC:
> > > +      /* Check GOTPC32 TLSDESC access model:
> > > +
> > > +        --- LP64 mode ---
> > > +        leaq x@tlsdesc(%rip), %reg64 --> Memory reg must be %rip.
> > > +
> > > +        --- X32 mode ---
> > > +        rex/rex2 leal x@tlsdesc(%rip), %reg32 --> Memory reg must be %rip.
> > > +
> > > +        In X32 mode, gas will add rex/rex2 for it later, no need to check
> > > +        here.
> > > +       */
> > > +      if (i.tm.mnem_off != MN_lea)
> > > +       return x86_tls_error_insn;
> > > +      if (!i.base_reg)
> > > +       return x86_tls_error_no_base_reg;
> > > +      if (i.base_reg->reg_num != RegIP
> > > +         || !i.base_reg->reg_type.bitfield.qword)
> > > +       return x86_tls_error_rip;
> > > +      if (!i.op[1].regs->reg_type.bitfield.dword
> > > +         && !i.op[1].regs->reg_type.bitfield.qword)
> 
> Please check
> 
> if (x86_elf_abi == X86_64_ABI)
> 
> to allow only qword for x64 and dword/qword for x32.
> 

I mixed up LP64 and X32, they really should be separated.

> > > +    case BFD_RELOC_X86_64_GOTTPOFF:
> > > +      /* Check GOTTPOFF access model:
> > > +
> > > +        mov foo@gottpoff(%rip), %reg --> Memory Reg must be %rip.
> > > +        add foo@gottpoff(%rip), %reg --> Memory Reg must be %rip.
> > > +        add %reg1, foo@gottpoff(%rip), %reg2 --> Memory Reg must be %rip.
> > > +        add foo@gottpoff(%rip), %reg1, %reg2 --> Memory Reg must be %rip.
> > > +       */
> > > +      if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
> > > +       return x86_tls_error_insn;
> > > +      if (i.op[i.operands - 1].regs->reg_type.bitfield.class != Reg
> > > +         || (i.op[0].regs->reg_type.bitfield.class
> > > +             && i.tm.opcode_modifier.vexvvvv != VexVVVV_DST)
> > > +         || i.imm_operands)
> > > +       return x86_tls_error_opcode;
> > > +      if (!i.base_reg)
> > > +       return x86_tls_error_no_base_reg;
> > > +      if (i.base_reg->reg_num != RegIP
> > > +         || !i.base_reg->reg_type.bitfield.qword)
> > > +       return x86_tls_error_rip;
> > > +      if (!i.op[i.operands - 1].regs->reg_type.bitfield.dword
> > > +         && !i.op[i.operands - 1].regs->reg_type.bitfield.qword)
> > > +       return x86_tls_error_dest_reg_size;
> 
> Please check
> 
> if (x86_elf_abi == X86_64_ABI)
> 
> to allow only qword for x64 and dword/qword for x32.
> 

Done.

> > >         kmovd   foo@gotntpoff(%eax), %k0
> > > +
> > > +       /* Invalid testcase for BFD_RELOC_386_TLS_GD.  */
> 
> Don't use the internal BFD relocation names.  Please use the standard
> ELF relocation names, R_386_XXX and R_X86_64_XXX.
> 

Done.

> > [hjl@gnu-tgl-3 tmp]$ mv tlsdesc4.s x.s
> > [hjl@gnu-tgl-3 tmp]$ cat x.s
> > .text
> > .globl _start
> > .type _start,@function
> > _start:
> > lea foo@tlsdesc(%rip), %eax
> > call *foo@tlscall(%rax)
> > .globl foo
> > .section .tdata,"awT",@progbits
> > .align 8
> > .type foo, @object
> > .size foo, 8
> > foo:
> > .quad 100
> > [hjl@gnu-tgl-3 tmp]$ gcc -c x.s
> > [hjl@gnu-tgl-3 tmp]$ ld x.o
> > x.o: TLS transition from R_X86_64_GOTPC32_TLSDESC to
> R_X86_64_GOTTPOFF
> > against `foo' at 0x2 in section `.text' failed
> > ld: failed to set dynamic section sizes: bad value
> > [hjl@gnu-tgl-3 tmp]$
> 
> Please also run x32 invalid TLS relocation tests.
> 

Done.

Thanks,
Lili.