[PATCH v1 1/3] aarch64: Fix IMAGE_REL_ARM64_PAGEBASE_REL21 relocation and symbol reduction for relocations

[Evgeny Karpov]

Monday, September 30, 2024
Richard Earnshaw (lists) <Richard.Earnshaw@arm.com> wrote:

>> To resolve this issue, S_SHOULD_BE_REDUCED_TO_SECTION_NAME has been
>> added.
>
> I'm not exactly sure where we got to with this patch, it might have been dropped.  But one thing I noticed is that
> S_SHOULD_BE_REDUCED_TO_SECTION_NAME seems to be trying to achieve the same effect as the tc_fix_adjustable()
> hook, which can tell the generic assembler code if it is safe to replace one symbol with another+offset.  I note that 
> aarch64 does not define this, which may be the source of some of the issues you are seeing.

The patch remains, and two lines in IMAGE_REL_ARM64_PAGEBASE_REL21 are reverted.
Thank you for mentioning tc_fix_adjustable. It looks like it fits well with the patch's needs.

Here is the updated patch.

Regards,
Evgeny


diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 3f6a608b728..84af335b3a0 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -579,8 +579,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 		input_section, rel->r_vaddr - input_section->vma);
 
 	    bfd_putl32 (val, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -614,7 +613,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= val & 0x3ffffff;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+	    rel->r_vaddr = -1;
 
 	    break;
 	  }
@@ -649,8 +648,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= (val & 0x7ffff) << 5;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -684,8 +682,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= (val & 0x3fff) << 5;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -721,7 +718,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= (val & 0x1ffffc) << 3;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+	    rel->r_vaddr = -1;
 
 	    break;
 	  }
@@ -758,8 +755,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= (val & 0x1ffffc) << 3;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -787,8 +783,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 		input_section, rel->r_vaddr - input_section->vma);
 
 	    bfd_putl32 (val, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -832,8 +827,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= val << 10;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -855,8 +849,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    opcode |= val << 10;
 
 	    bfd_putl32 (opcode, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -876,8 +869,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 		input_section, rel->r_vaddr - input_section->vma);
 
 	    bfd_putl32 (val, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
@@ -901,8 +893,7 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 
 
 	    bfd_putl16 (idx, contents + rel->r_vaddr);
-	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
-
+	    rel->r_vaddr = -1;
 	    break;
 	  }
 
diff --git a/bfd/cofflink.c b/bfd/cofflink.c
index 4a91d5a1833..6cded78c3bb 100644
--- a/bfd/cofflink.c
+++ b/bfd/cofflink.c
@@ -2934,6 +2934,9 @@ _bfd_coff_generic_relocate_section (bfd *output_bfd,
 
       symndx = rel->r_symndx;
 
+      if (rel->r_vaddr == (bfd_vma) -1)
+	continue;
+
       if (symndx == -1)
 	{
 	  h = NULL;
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index e94a0cff406..b515e668822 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2189,6 +2189,27 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
 }
 
 #if defined(OBJ_ELF) || defined(OBJ_COFF)
+
+#if defined OBJ_COFF
+
+bool
+aarch64_fix_adjustable (fixS * fixP)
+{
+  symbolS* sym = fixP->fx_addsy;
+  if (!sym)
+    return true;
+
+  if (S_GET_STORAGE_CLASS (sym) == C_STAT)
+    return false;
+
+  if (symbol_get_bfdsym (sym)->section->flags & (SEC_DATA | SEC_READONLY))
+    return false;
+
+  return true;
+}
+
+#endif
+
 /* Forward declarations for functions below, in the MD interface
    section.  */
 static struct reloc_table_entry * find_reloc_table_entry (char **);
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 15e22436bf7..f3288a5ae5d 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -250,7 +250,12 @@ extern void aarch64_after_parse_args (void);
 #define md_after_parse_args() aarch64_after_parse_args ()
 
 # define EXTERN_FORCE_RELOC 			1
+
+#if defined OBJ_COFF
+# define tc_fix_adjustable(FIX) aarch64_fix_adjustable (FIX)
+#else
 # define tc_fix_adjustable(FIX) 		1
+#endif
 
 /* Values passed to md_apply_fix don't include the symbol value.  */
 # define MD_APPLY_SYM_VALUE(FIX) 		0
@@ -332,6 +337,7 @@ extern void aarch64elf_frob_symbol (symbolS *, int *);
 extern void cons_fix_new_aarch64 (fragS *, int, int, expressionS *);
 extern void aarch64_init_frag (struct frag *, int);
 extern void aarch64_handle_align (struct frag *);
+extern bool aarch64_fix_adjustable (struct fix *);
 extern int tc_aarch64_regname_to_dw2regnum (char *regname);
 extern void tc_aarch64_frame_initial_instructions (void);