[PATCH v1] RISC-V: Let fcvt.* recognize rounding mode != 0

[Jan Beulich]

On 15.10.2024 11:30, Hau Hsu wrote:
> For those floating point convert instructions that convert from lower
> precisions to higher precisions, although the rounding mode has no
> effects, the spec doesn’t forbid them to be values other than zero.

Yet what's the point of permitting the use of misleading operands? In the
commit you refer to below I specifically said that the non-standard 3-
operand forms are left merely to avoid breaking existing code. At some
point I think use of them should actually be warned about, to allow their
removal at a yet later point.

Or is this just for the sake of disassembly, when some of the RM bits are
set? In that cases I'm inclined to request that measures be taken to avoid
their use when assembling code.

> fcvt.q.l and fcvt.q.lu were fixed by 1d1595b. This patch also adds
> test for them.

You add tests for the 3-operand forms, whereas the mentioned commit fixed
the 2-operand ones.

Jan