[PATCH 1/6] Support Intel AMX-TRANSPOSE

[Jiang, Haochen]

> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, November 13, 2024 5:21 PM
> 
> On 13.11.2024 09:56, Jiang, Haochen wrote:
> >> From: Haochen Jiang <haochen.jiang@intel.com>
> >> Sent: Wednesday, November 13, 2024 4:45 PM
> >>
> >> To implement TMM pair, we introduced TMMPairOperand into
> >> i386_opcide_modifier. We allocated three bit for this to indicate
> >> whether and which tmm register is tmm pair register for flexiblity
> >> in future. In assembler, we need to adjust tmm register number to
> >> even number for tmm pair register.
> >>
> >
> > Forgot to mention here. It might be the similar register scenario
> > as Jan mentioned in this thread:
> > https://sourceware.org/pipermail/binutils/2024-November/137588.html
> >
> > When we wrote this patch, we did not realize we could use that.
> > I will have a try if we can have a simple way.
> 
> Yes, that looks like it'll want re-using. Even if not, I don't see why
> 3 bits need using there. If and when such insns appear, we can decide#
> whether to widen a field, or how else to approach the situation.

Yes, using 3 bits is due to a future extension for multiple pair operands.
We could push that in the future.

Currently, re-using the implicit group should be ok. But when there are
multiple pair operands or different operand placement for tmm pair
operand in the future, we would need some change for that. 

Thx,
Haochen