[PATCH 1/2] Rename Opcode Space Name Vexmap7 to Map7

[Hu, Lin1]

Due to some new evex instructions use map7, so change space name from vexmap7
to map7 like other space names.

gas/ChangeLog:

	* config/tc-i386.c (build_vex_prefix): Change SPACE_VEXMAP7 to
	SPACE_MAP7.
	(build_evex_prefix): Ditto.

opcodes/ChangeLog:

	* i386-gen.c (process_i386_opcode_modifier):
	Change SPACE(VEXMAP5) to SPACE(MAP7).
	* i386-opc.h (insn_template): Change SPACE_VEXMAP7 to SPACE_MAP7.
	* i386-opc.tbl: Change VexMap7 to SpaceMap7.
	* i386-tbl.h: Regenerated.
---
 gas/config/tc-i386.c | 4 ++--
 opcodes/i386-gen.c   | 2 +-
 opcodes/i386-opc.h   | 4 ++--
 opcodes/i386-opc.tbl | 7 +++----
 opcodes/i386-tbl.h   | 4 ++--
 5 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 14397083391..1d84fdaf65f 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4211,7 +4211,7 @@ build_vex_prefix (const insn_template *t)
 	case SPACE_0F:
 	case SPACE_0F38:
 	case SPACE_0F3A:
-	case SPACE_VEXMAP7:
+	case SPACE_MAP7:
 	  i.vex.bytes[0] = 0xc4;
 	  break;
 	case SPACE_XOP08:
@@ -4370,7 +4370,7 @@ build_evex_prefix (void)
   /* The high 3 bits of the second EVEX byte are 1's compliment of RXB
      bits from REX.  */
   gas_assert (i.tm.opcode_space >= SPACE_0F);
-  gas_assert (i.tm.opcode_space <= SPACE_VEXMAP7);
+  gas_assert (i.tm.opcode_space <= SPACE_MAP7);
   i.vex.bytes[1] = ((~i.rex & 7) << 5)
 		   | (!dot_insn () ? i.tm.opcode_space
 				   : i.insn_opcode_space);
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 053b66675c5..cacab1cefd0 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1142,7 +1142,7 @@ process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space,
     SPACE(EVEXMAP4),
     SPACE(EVEXMAP5),
     SPACE(EVEXMAP6),
-    SPACE(VEXMAP7),
+    SPACE(MAP7),
     SPACE(XOP08),
     SPACE(XOP09),
     SPACE(XOP0A),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index d404fbc6b05..a669d88a2d9 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -995,7 +995,7 @@ typedef struct insn_template
      4: EVEXMAP4 opcode prefix / space.
      5: EVEXMAP5 opcode prefix / space.
      6: EVEXMAP6 opcode prefix / space.
-     7: VEXMAP7 opcode prefix / space.
+     7: MAP7 opcode prefix / space.
      8: XOP 08 opcode space.
      9: XOP 09 opcode space.
      A: XOP 0A opcode space.
@@ -1007,7 +1007,7 @@ typedef struct insn_template
 #define SPACE_EVEXMAP4	4
 #define SPACE_EVEXMAP5	5
 #define SPACE_EVEXMAP6	6
-#define SPACE_VEXMAP7	7
+#define SPACE_MAP7	7
 #define SPACE_XOP08	8
 #define SPACE_XOP09	9
 #define SPACE_XOP0A	0xA
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 23b678d46bc..1ff504f85d6 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -112,6 +112,7 @@
 #define Space0F    OpcodeSpace=SPACE_0F
 #define Space0F38  OpcodeSpace=SPACE_0F38
 #define Space0F3A  OpcodeSpace=SPACE_0F3A
+#define SpaceMap7  OpcodeSpace=SPACE_MAP7
 #define SpaceXOP08 OpcodeSpace=SPACE_XOP08
 #define SpaceXOP09 OpcodeSpace=SPACE_XOP09
 #define SpaceXOP0A OpcodeSpace=SPACE_XOP0A
@@ -120,8 +121,6 @@
 #define EVexMap5 OpcodeSpace=SPACE_EVEXMAP5
 #define EVexMap6 OpcodeSpace=SPACE_EVEXMAP6
 
-#define VexMap7 OpcodeSpace=SPACE_VEXMAP7
-
 #define VexW0 VexW=VEXW0
 #define VexW1 VexW=VEXW1
 #define VexWIG VexW=VEXWIG
@@ -3412,12 +3411,12 @@ eretu, 0xf30f01ca, FRED, NoSuf, {}
 
 urdmsr, 0xf20f38f8, USER_MSR, RegMem|NoSuf|NoRex64, { Reg64, Reg64 }
 urdmsr, 0xf2f8, USER_MSR&APX_F, RegMem|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
-urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
+urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|SpaceMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
 uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 }
 uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
 // Immediates want to be first; md_assemble() takes care of swapping operands
 // accordingly.
-uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
+uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|SpaceMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
 
 // USER_MSR instructions end.
 
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index f5d73d58309..ce5d64e36df 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -45922,7 +45922,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_urdmsr, 0xf8, 2, SPACE_VEXMAP7, 0,
+  { MN_urdmsr, 0xf8, 2, SPACE_MAP7, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
@@ -45952,7 +45952,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_uwrmsr, 0xf8, 2, SPACE_VEXMAP7, 0,
+  { MN_uwrmsr, 0xf8, 2, SPACE_MAP7, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-- 
2.31.1