[PATCH v1 5/7][BINUTILS] aarch64: Fix the wrong constraint used for sve2p1 instructions.
srinath
srinath.parvathaneni@arm.com
Wed May 22 10:04:36 GMT 2024
HI,
The current implementation for the following SVE2p1 instructions add a constraint in aarch64_opcode_table[]
array, so that these instruction might be immediately preceded in program order by a MOVPRFX instruction.
As per the spec these instruction does not immediately preceded in program order by a MOVPRFX instruction
and to fix this issue, SVE2p1_INSNC macro is replaced with SVE2p1_INSN macro for the entries of these
instructions in aarch64_opcode_table[] array.
List of instructions updated: addqv, andqv, smaxqv, sminqv, umaxqv, uminqv, eorqv, faddqv, fmaxnmqv,
fmaxqv, fminnmqv and fminqv
Regression testing for aarch64-none-elf target and found no regressions.
Ok for binutils-master?
Regards,
Srinath.
---
gas/testsuite/gas/aarch64/sve2p1-1-invalid.d | 4 +
gas/testsuite/gas/aarch64/sve2p1-1-invalid.l | 101 +++++++++++++++++++
gas/testsuite/gas/aarch64/sve2p1-1-invalid.s | 26 +++++
opcodes/aarch64-tbl.h | 25 +++--
4 files changed, 143 insertions(+), 13 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2p1-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2p1-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2p1-1-invalid.s
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