[PATCH][Binutils] aarch64: fix incorrect encoding for system register pmsdsfr_el1

[Matthieu Longo]

This patch fixes a mistake in the encoding of the system register 
pmsdsfr_el1.
Reference: 
https://developer.arm.com/documentation/ddi0601/2022-09/AArch64-Registers/PMSDSFR-EL1--Sampling-Data-Source-Filter-Register?lang=en

---

Hi,

Regression tested on aarch64-none-elf, and no regression found.

Ok for binutils-master? I don't have commit access so I need someone to 
commit on my behalf.

Regards,
Matthieu.
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From cee304f865f174312b46ec0065afdfc10ad2f7bf Mon Sep 17 00:00:00 2001
From: Matthieu Longo <matthieu.longo@arm.com>
Date: Fri, 17 May 2024 12:04:25 +0100
Subject: [PATCH] aarch64: fix incorrect encoding for system register
 pmsdsfr_el1

This patch fixes a mistake in the encoding of the system register
pmsdsfr_el1.

Reference:
https://developer.arm.com/documentation/ddi0601/2022-09/AArch64-Registers/PMSDSFR-EL1--Sampling-Data-Source-Filter-Register?lang=en
---
 gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d | 4 ++--
 opcodes/aarch64-sys-regs.def                         | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
index e420f7077a6..4c19a501a3f 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
+++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
@@ -7,8 +7,8 @@
 Disassembly of section \.text:
 
 0+ <.*>:
-.*:	d51c9a83 	msr	pmsdsfr_el1, x3
-.*:	d53c9a83 	mrs	x3, pmsdsfr_el1
+.*:	d5189a83 	msr	pmsdsfr_el1, x3
+.*:	d5389a83 	mrs	x3, pmsdsfr_el1
 .*:	d5385340 	mrs	x0, erxgsr_el1
 .*:	d5181063 	msr	sctlr2_el1, x3
 .*:	d5381063 	mrs	x3, sctlr2_el1
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 7cbc9a4811f..e9d2e3525b2 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -740,7 +740,7 @@
   SYSREG ("pmscr_el1",		CPENC (3,0,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmscr_el12",		CPENC (3,5,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmscr_el2",		CPENC (3,4,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
-  SYSREG ("pmsdsfr_el1",	CPENC (3,4,9,10,4),	F_ARCHEXT,		AARCH64_FEATURE (SPE_FDS))
+  SYSREG ("pmsdsfr_el1",	CPENC (3,0,9,10,4),	F_ARCHEXT,		AARCH64_FEATURE (SPE_FDS))
   SYSREG ("pmselr_el0",		CPENC (3,3,9,12,5),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmsevfr_el1",	CPENC (3,0,9,9,5),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmsfcr_el1",		CPENC (3,0,9,9,4),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
-- 
2.45.0