[PATCH v2 2/2] gas, aarch64: Add SVE2 lut extension

Richard Earnshaw (lists) Richard.Earnshaw@arm.com
Mon May 20 13:34:54 GMT 2024


On 16/05/2024 11:37, Saurabh Jha wrote:
> Introduces instructions for the SVE2 lut extension for AArch64. They are documented in the following links:
> * luti2: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI2--Lookup-table-read-with-2-bit-indices-?lang=en
> * luti4: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI4--Lookup-table-read-with-4-bit-indices-?lang=en
> 
> These instructions use new SVE2 vector operands. They are called
> SVE_Zm1_23_INDEX, SVE_Zm2_22_INDEX, and Zm3_12_INDEX and they have
> 1 bit, 2 bit, and 3 bit indices respectively.
> 
> For these new operands, we defined a new inserter and a new extractor.
> 
> The lsb and width of these new operands are the same as many existing
> operands but the convention is to give different names to fields that
> serve different purpose so we introduced new fields in aarch64-opc.c
> and aarch64-opc.h.
> 
> We made a design choice for the second operand of the halfword variant of
> luti4 with two register tables. We could have either defined a new operand,
> like SVE_Znx2, or we could have use the existing operand SVE_ZnxN. With
> the new operand, we would need to implement constraints on register
> lists based on either operand or opcode flag. With existing operand, we
> could just existing constraint checks using opcode flag. We chose
> the second approach and went with SVE_ZnxN and added opcode flag to
> enforce lengths of vector register list operands. This way, we can reuse
> the existing constraint check logic.
> ---
> Hi,
> 
> Regression tested for aarch64-none-elf and found no regressions.
> 
> Ok for binutils-master? I don't have commit access so can someone please commit on my behalf?
> 
> Regards,
> Saurabh

Similar comments as for patch 1/2, but additionally:

+  28:	45e0b800 	luti2	z0.h, \{z0.h\}, z0\[7\]

The immediate field for the '[7]' index is split over two locations in the encoded pattern, so I think it's worth some additional checks here that the field is encoded in the right way.  I'd suggest adding '[1]' and '[4]' variants.

+  68:	4520b7c0 	luti4	z0.h, \{z30.h-z31.h\}, z0\[0\]

We should probably also check the wrap-around case of '{z31.h, z0.h}'

Otherwise this looks OK.

R.


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