[PATCH 0/3] Support APX zero-upper

[Cui, Lili]

In order to put EVEX old register checking together with REX/REX2, I created a new patch 1/3 to split "REX/REX2 old register checking" and "add empty rex prefix" into two separate branches. Then extend it to EVEX format.

1. Adjusted the indentation of test cases in patch 2/3 (previously 1/2).
2. Removed the redundancy of modifying {evex} in patch 3/3 (previously 2/2).
3. Since Intel will not update the new setzu form in the spec, I will not add set<cc> reg32/reg64 support in this patch.

*** BLURB HERE ***

Cui, Lili (3):
  x86: Split REX/REX2 old registers judgment.
  Add check for 8-bit old registers in EVEX format
  Support APX zero-upper

 gas/config/tc-i386.c                         |  33 +++---
 gas/testsuite/gas/i386/rex-bad.l             |   8 +-
 gas/testsuite/gas/i386/x86-64-apx-inval.l    |   3 +
 gas/testsuite/gas/i386/x86-64-apx-inval.s    |   2 +
 gas/testsuite/gas/i386/x86-64-apx-zu-intel.d |  78 +++++++++++++
 gas/testsuite/gas/i386/x86-64-apx-zu-inval.l |  25 +++++
 gas/testsuite/gas/i386/x86-64-apx-zu-inval.s |  28 +++++
 gas/testsuite/gas/i386/x86-64-apx-zu.d       |  78 +++++++++++++
 gas/testsuite/gas/i386/x86-64-apx-zu.s       |  73 ++++++++++++
 gas/testsuite/gas/i386/x86-64.exp            |   3 +
 opcodes/i386-dis-evex-prefix.h               | 112 +++++++++++++++++++
 opcodes/i386-dis-evex.h                      |  36 +++---
 opcodes/i386-dis.c                           |  29 +++++
 opcodes/i386-gen.c                           |   1 +
 opcodes/i386-opc.h                           |   4 +
 opcodes/i386-opc.tbl                         |   6 +
 16 files changed, 480 insertions(+), 39 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/x86-64-apx-zu-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-apx-zu-inval.l
 create mode 100644 gas/testsuite/gas/i386/x86-64-apx-zu-inval.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-apx-zu.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-apx-zu.s

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2.34.1