[PATCH] Support APX CFCMOV
Cui, Lili
lili.cui@intel.com
Wed Jun 26 11:18:09 GMT 2024
> On 26.06.2024 12:29, Cui, Lili wrote:
> >>> Finally a remark on the spec itself, similarly affecting the
> >>> 3-operand form of
> >>> CMOVcc: The spec uses Intel syntax. In Intel syntax present NDD
> >>> operand ordering is "ndd, reg, r/m". I consider this severely
> >>> misleading, and hence I'd like to ask that it be considered for
> >>> operand order to change (in gas we could retain present order for
> >>> AT&T
> >> syntax, as _there_ it makes sense). The "reg"
> >>> operand, after all, supplies only the fallback value (i.e. when <cc>
> >>> resolves to false). Naming the fallback before the "main" source
> >>> operand is, well, at best confusing.
> >>
> >> We need internal discussion.
> >
> > To be consistent with NDD, spec does not want to make special changes to
> the Intel format of CMOVcc. NDD always adds a reg before the first src of the
> legacy instruction, such as sub.
>
> A misunderstanding? The destination (i.e. ndd) is fine as is. It's the other two
> operands which are in unhelpful order. And there are ample insns with "ndd,
> r/m, reg" operand order already (which is what I'm asking to switch to).
>
It means NDD just want to add a new reg before the legacy operands, keeping the order of the other operands consistent with the legacy.
For example:
Legacy : sub r/m, reg CMOVcc reg, r/m
NDD : sub reg(new), r/m, reg CMOVcc reg(new), reg, r/m
Lili.
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