[PATCH] aarch64: FP8 scale and convert - Implement minor improvements
Richard Earnshaw (lists)
Richard.Earnshaw@arm.com
Tue Jun 25 10:49:16 GMT 2024
On 25/06/2024 11:16, Victor Do Nascimento wrote:
> Following feedback received shortly after the initial commit of the
> aarch64 instructions for scaling and converting fp8 instructions, this
> patch addresses the issues raised in the relevant feedback.
>
> This includes the following changes:
>
> * Standardize all FP8 qualifier-set names. This has resulted in the
> renaming of QL_V2FP8B8H to QL_V2_HB_LOWER and, likewise, QL_V28H16B
> to QL_V2_HB_FULL.
>
> * Update `FP8_INSN' aarch64_opcode_table[] entries to reflect the new
> standardized qualifier-set names mentioned above and, in the case of
> the "fcvtn" entries, also add a leading 0 to their opcode values so
> they are given as 8 hexadecimal digits in length to ensure
> consistency in formatting relative to other entries in the table.
>
> * Revise the added test-cases so that when checking operand fields in
> the disassembled binaries, all bits for these fields get tested to
> ensure they can be toggled on/off by the relevant operand arguments.
OK
R.
> ---
> gas/testsuite/gas/aarch64/advsimd-fp8.d | 179 +++++++++++-------------
> gas/testsuite/gas/aarch64/advsimd-fp8.s | 41 +++---
> gas/testsuite/gas/aarch64/sme2-fp8.d | 90 ++++++------
> gas/testsuite/gas/aarch64/sme2-fp8.s | 28 ++--
> gas/testsuite/gas/aarch64/sve2-fp8-dump | 24 ++--
> gas/testsuite/gas/aarch64/sve2-fp8.s | 5 +-
> opcodes/aarch64-tbl.h | 24 ++--
> 7 files changed, 178 insertions(+), 213 deletions(-)
>
> diff --git a/gas/testsuite/gas/aarch64/advsimd-fp8.d b/gas/testsuite/gas/aarch64/advsimd-fp8.d
> index b4592a7cf91..7348ba9e7c4 100644
> --- a/gas/testsuite/gas/aarch64/advsimd-fp8.d
> +++ b/gas/testsuite/gas/aarch64/advsimd-fp8.d
> @@ -6,115 +6,104 @@
> Disassembly of section \.text:
>
> 0+ <.*>:
> +
> [ ]*[0-9a-f]+: 2ea17800 bf1cvtl v0.8h, v0.8b
> -[ ]*[0-9a-f]+: 2ea17801 bf1cvtl v1.8h, v0.8b
> -[ ]*[0-9a-f]+: 2ea17820 bf1cvtl v0.8h, v1.8b
> -[ ]*[0-9a-f]+: 2ea17821 bf1cvtl v1.8h, v1.8b
> -[ ]*[0-9a-f]+: 2ea17a30 bf1cvtl v16.8h, v17.8b
> +[ ]*[0-9a-f]+: 2ea1781f bf1cvtl v31.8h, v0.8b
> +[ ]*[0-9a-f]+: 2ea17be0 bf1cvtl v0.8h, v31.8b
> +[ ]*[0-9a-f]+: 2ea17bff bf1cvtl v31.8h, v31.8b
> [ ]*[0-9a-f]+: 2ee17800 bf2cvtl v0.8h, v0.8b
> -[ ]*[0-9a-f]+: 2ee17801 bf2cvtl v1.8h, v0.8b
> -[ ]*[0-9a-f]+: 2ee17820 bf2cvtl v0.8h, v1.8b
> -[ ]*[0-9a-f]+: 2ee17821 bf2cvtl v1.8h, v1.8b
> -[ ]*[0-9a-f]+: 2ee17a30 bf2cvtl v16.8h, v17.8b
> +[ ]*[0-9a-f]+: 2ee1781f bf2cvtl v31.8h, v0.8b
> +[ ]*[0-9a-f]+: 2ee17be0 bf2cvtl v0.8h, v31.8b
> +[ ]*[0-9a-f]+: 2ee17bff bf2cvtl v31.8h, v31.8b
> [ ]*[0-9a-f]+: 2e217800 f1cvtl v0.8h, v0.8b
> -[ ]*[0-9a-f]+: 2e217801 f1cvtl v1.8h, v0.8b
> -[ ]*[0-9a-f]+: 2e217820 f1cvtl v0.8h, v1.8b
> -[ ]*[0-9a-f]+: 2e217821 f1cvtl v1.8h, v1.8b
> -[ ]*[0-9a-f]+: 2e217a30 f1cvtl v16.8h, v17.8b
> +[ ]*[0-9a-f]+: 2e21781f f1cvtl v31.8h, v0.8b
> +[ ]*[0-9a-f]+: 2e217be0 f1cvtl v0.8h, v31.8b
> +[ ]*[0-9a-f]+: 2e217bff f1cvtl v31.8h, v31.8b
> [ ]*[0-9a-f]+: 2e617800 f2cvtl v0.8h, v0.8b
> -[ ]*[0-9a-f]+: 2e617801 f2cvtl v1.8h, v0.8b
> -[ ]*[0-9a-f]+: 2e617820 f2cvtl v0.8h, v1.8b
> -[ ]*[0-9a-f]+: 2e617821 f2cvtl v1.8h, v1.8b
> -[ ]*[0-9a-f]+: 2e617a30 f2cvtl v16.8h, v17.8b
> +[ ]*[0-9a-f]+: 2e61781f f2cvtl v31.8h, v0.8b
> +[ ]*[0-9a-f]+: 2e617be0 f2cvtl v0.8h, v31.8b
> +[ ]*[0-9a-f]+: 2e617bff f2cvtl v31.8h, v31.8b
> [ ]*[0-9a-f]+: 6ea17800 bf1cvtl2 v0.8h, v0.16b
> -[ ]*[0-9a-f]+: 6ea17801 bf1cvtl2 v1.8h, v0.16b
> -[ ]*[0-9a-f]+: 6ea17820 bf1cvtl2 v0.8h, v1.16b
> -[ ]*[0-9a-f]+: 6ea17821 bf1cvtl2 v1.8h, v1.16b
> -[ ]*[0-9a-f]+: 6ea17a30 bf1cvtl2 v16.8h, v17.16b
> +[ ]*[0-9a-f]+: 6ea1781f bf1cvtl2 v31.8h, v0.16b
> +[ ]*[0-9a-f]+: 6ea17be0 bf1cvtl2 v0.8h, v31.16b
> +[ ]*[0-9a-f]+: 6ea17bff bf1cvtl2 v31.8h, v31.16b
> [ ]*[0-9a-f]+: 6ee17800 bf2cvtl2 v0.8h, v0.16b
> -[ ]*[0-9a-f]+: 6ee17801 bf2cvtl2 v1.8h, v0.16b
> -[ ]*[0-9a-f]+: 6ee17820 bf2cvtl2 v0.8h, v1.16b
> -[ ]*[0-9a-f]+: 6ee17821 bf2cvtl2 v1.8h, v1.16b
> -[ ]*[0-9a-f]+: 6ee17a30 bf2cvtl2 v16.8h, v17.16b
> +[ ]*[0-9a-f]+: 6ee1781f bf2cvtl2 v31.8h, v0.16b
> +[ ]*[0-9a-f]+: 6ee17be0 bf2cvtl2 v0.8h, v31.16b
> +[ ]*[0-9a-f]+: 6ee17bff bf2cvtl2 v31.8h, v31.16b
> [ ]*[0-9a-f]+: 6e217800 f1cvtl2 v0.8h, v0.16b
> -[ ]*[0-9a-f]+: 6e217801 f1cvtl2 v1.8h, v0.16b
> -[ ]*[0-9a-f]+: 6e217820 f1cvtl2 v0.8h, v1.16b
> -[ ]*[0-9a-f]+: 6e217821 f1cvtl2 v1.8h, v1.16b
> -[ ]*[0-9a-f]+: 6e217a30 f1cvtl2 v16.8h, v17.16b
> +[ ]*[0-9a-f]+: 6e21781f f1cvtl2 v31.8h, v0.16b
> +[ ]*[0-9a-f]+: 6e217be0 f1cvtl2 v0.8h, v31.16b
> +[ ]*[0-9a-f]+: 6e217bff f1cvtl2 v31.8h, v31.16b
> [ ]*[0-9a-f]+: 6e617800 f2cvtl2 v0.8h, v0.16b
> -[ ]*[0-9a-f]+: 6e617801 f2cvtl2 v1.8h, v0.16b
> -[ ]*[0-9a-f]+: 6e617820 f2cvtl2 v0.8h, v1.16b
> -[ ]*[0-9a-f]+: 6e617821 f2cvtl2 v1.8h, v1.16b
> -[ ]*[0-9a-f]+: 6e617a30 f2cvtl2 v16.8h, v17.16b
> +[ ]*[0-9a-f]+: 6e61781f f2cvtl2 v31.8h, v0.16b
> +[ ]*[0-9a-f]+: 6e617be0 f2cvtl2 v0.8h, v31.16b
> +[ ]*[0-9a-f]+: 6e617bff f2cvtl2 v31.8h, v31.16b
> [ ]*[0-9a-f]+: 2ec03c00 fscale v0.4h, v0.4h, v0.4h
> -[ ]*[0-9a-f]+: 2ec03c01 fscale v1.4h, v0.4h, v0.4h
> -[ ]*[0-9a-f]+: 2ec03c20 fscale v0.4h, v1.4h, v0.4h
> -[ ]*[0-9a-f]+: 2ec13c00 fscale v0.4h, v0.4h, v1.4h
> -[ ]*[0-9a-f]+: 2ec03c21 fscale v1.4h, v1.4h, v0.4h
> -[ ]*[0-9a-f]+: 2ec13c20 fscale v0.4h, v1.4h, v1.4h
> -[ ]*[0-9a-f]+: 2ec13c21 fscale v1.4h, v1.4h, v1.4h
> -[ ]*[0-9a-f]+: 2ed23e30 fscale v16.4h, v17.4h, v18.4h
> +[ ]*[0-9a-f]+: 2ec03c1f fscale v31.4h, v0.4h, v0.4h
> +[ ]*[0-9a-f]+: 2ec03fe0 fscale v0.4h, v31.4h, v0.4h
> +[ ]*[0-9a-f]+: 2edf3c00 fscale v0.4h, v0.4h, v31.4h
> +[ ]*[0-9a-f]+: 2ec03fff fscale v31.4h, v31.4h, v0.4h
> +[ ]*[0-9a-f]+: 2edf3fe0 fscale v0.4h, v31.4h, v31.4h
> +[ ]*[0-9a-f]+: 2ec03fff fscale v31.4h, v31.4h, v0.4h
> +[ ]*[0-9a-f]+: 2edf3fff fscale v31.4h, v31.4h, v31.4h
> [ ]*[0-9a-f]+: 6ec03c00 fscale v0.8h, v0.8h, v0.8h
> -[ ]*[0-9a-f]+: 6ec03c01 fscale v1.8h, v0.8h, v0.8h
> -[ ]*[0-9a-f]+: 6ec03c20 fscale v0.8h, v1.8h, v0.8h
> -[ ]*[0-9a-f]+: 6ec13c00 fscale v0.8h, v0.8h, v1.8h
> -[ ]*[0-9a-f]+: 6ec03c21 fscale v1.8h, v1.8h, v0.8h
> -[ ]*[0-9a-f]+: 6ec13c20 fscale v0.8h, v1.8h, v1.8h
> -[ ]*[0-9a-f]+: 6ec13c21 fscale v1.8h, v1.8h, v1.8h
> -[ ]*[0-9a-f]+: 6ed23e30 fscale v16.8h, v17.8h, v18.8h
> +[ ]*[0-9a-f]+: 6ec03c1f fscale v31.8h, v0.8h, v0.8h
> +[ ]*[0-9a-f]+: 6ec03fe0 fscale v0.8h, v31.8h, v0.8h
> +[ ]*[0-9a-f]+: 6edf3c00 fscale v0.8h, v0.8h, v31.8h
> +[ ]*[0-9a-f]+: 6ec03fff fscale v31.8h, v31.8h, v0.8h
> +[ ]*[0-9a-f]+: 6edf3fe0 fscale v0.8h, v31.8h, v31.8h
> +[ ]*[0-9a-f]+: 6ec03fff fscale v31.8h, v31.8h, v0.8h
> +[ ]*[0-9a-f]+: 6edf3fff fscale v31.8h, v31.8h, v31.8h
> [ ]*[0-9a-f]+: 2ea0fc00 fscale v0.2s, v0.2s, v0.2s
> -[ ]*[0-9a-f]+: 2ea0fc01 fscale v1.2s, v0.2s, v0.2s
> -[ ]*[0-9a-f]+: 2ea0fc20 fscale v0.2s, v1.2s, v0.2s
> -[ ]*[0-9a-f]+: 2ea1fc00 fscale v0.2s, v0.2s, v1.2s
> -[ ]*[0-9a-f]+: 2ea0fc21 fscale v1.2s, v1.2s, v0.2s
> -[ ]*[0-9a-f]+: 2ea1fc20 fscale v0.2s, v1.2s, v1.2s
> -[ ]*[0-9a-f]+: 2ea1fc21 fscale v1.2s, v1.2s, v1.2s
> -[ ]*[0-9a-f]+: 2eb2fe30 fscale v16.2s, v17.2s, v18.2s
> +[ ]*[0-9a-f]+: 2ea0fc1f fscale v31.2s, v0.2s, v0.2s
> +[ ]*[0-9a-f]+: 2ea0ffe0 fscale v0.2s, v31.2s, v0.2s
> +[ ]*[0-9a-f]+: 2ebffc00 fscale v0.2s, v0.2s, v31.2s
> +[ ]*[0-9a-f]+: 2ea0ffff fscale v31.2s, v31.2s, v0.2s
> +[ ]*[0-9a-f]+: 2ebfffe0 fscale v0.2s, v31.2s, v31.2s
> +[ ]*[0-9a-f]+: 2ea0ffff fscale v31.2s, v31.2s, v0.2s
> +[ ]*[0-9a-f]+: 2ebfffff fscale v31.2s, v31.2s, v31.2s
> [ ]*[0-9a-f]+: 6ea0fc00 fscale v0.4s, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 6ea0fc01 fscale v1.4s, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 6ea0fc20 fscale v0.4s, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 6ea1fc00 fscale v0.4s, v0.4s, v1.4s
> -[ ]*[0-9a-f]+: 6ea0fc21 fscale v1.4s, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 6ea1fc20 fscale v0.4s, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 6ea1fc21 fscale v1.4s, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 6eb2fe30 fscale v16.4s, v17.4s, v18.4s
> +[ ]*[0-9a-f]+: 6ea0fc1f fscale v31.4s, v0.4s, v0.4s
> +[ ]*[0-9a-f]+: 6ea0ffe0 fscale v0.4s, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 6ebffc00 fscale v0.4s, v0.4s, v31.4s
> +[ ]*[0-9a-f]+: 6ea0ffff fscale v31.4s, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 6ebfffe0 fscale v0.4s, v31.4s, v31.4s
> +[ ]*[0-9a-f]+: 6ea0ffff fscale v31.4s, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 6ebfffff fscale v31.4s, v31.4s, v31.4s
> [ ]*[0-9a-f]+: 6ee0fc00 fscale v0.2d, v0.2d, v0.2d
> -[ ]*[0-9a-f]+: 6ee0fc01 fscale v1.2d, v0.2d, v0.2d
> -[ ]*[0-9a-f]+: 6ee0fc20 fscale v0.2d, v1.2d, v0.2d
> -[ ]*[0-9a-f]+: 6ee1fc00 fscale v0.2d, v0.2d, v1.2d
> -[ ]*[0-9a-f]+: 6ee0fc21 fscale v1.2d, v1.2d, v0.2d
> -[ ]*[0-9a-f]+: 6ee1fc20 fscale v0.2d, v1.2d, v1.2d
> -[ ]*[0-9a-f]+: 6ee1fc21 fscale v1.2d, v1.2d, v1.2d
> -[ ]*[0-9a-f]+: 6ef2fe30 fscale v16.2d, v17.2d, v18.2d
> +[ ]*[0-9a-f]+: 6ee0fc1f fscale v31.2d, v0.2d, v0.2d
> +[ ]*[0-9a-f]+: 6ee0ffe0 fscale v0.2d, v31.2d, v0.2d
> +[ ]*[0-9a-f]+: 6efffc00 fscale v0.2d, v0.2d, v31.2d
> +[ ]*[0-9a-f]+: 6ee0ffff fscale v31.2d, v31.2d, v0.2d
> +[ ]*[0-9a-f]+: 6effffe0 fscale v0.2d, v31.2d, v31.2d
> +[ ]*[0-9a-f]+: 6ee0ffff fscale v31.2d, v31.2d, v0.2d
> +[ ]*[0-9a-f]+: 6effffff fscale v31.2d, v31.2d, v31.2d
> [ ]*[0-9a-f]+: 0e40f400 fcvtn v0.8b, v0.4h, v0.4h
> -[ ]*[0-9a-f]+: 0e40f401 fcvtn v1.8b, v0.4h, v0.4h
> -[ ]*[0-9a-f]+: 0e40f420 fcvtn v0.8b, v1.4h, v0.4h
> -[ ]*[0-9a-f]+: 0e41f400 fcvtn v0.8b, v0.4h, v1.4h
> -[ ]*[0-9a-f]+: 0e40f421 fcvtn v1.8b, v1.4h, v0.4h
> -[ ]*[0-9a-f]+: 0e41f420 fcvtn v0.8b, v1.4h, v1.4h
> -[ ]*[0-9a-f]+: 0e41f421 fcvtn v1.8b, v1.4h, v1.4h
> -[ ]*[0-9a-f]+: 0e52f630 fcvtn v16.8b, v17.4h, v18.4h
> +[ ]*[0-9a-f]+: 0e40f41f fcvtn v31.8b, v0.4h, v0.4h
> +[ ]*[0-9a-f]+: 0e40f7e0 fcvtn v0.8b, v31.4h, v0.4h
> +[ ]*[0-9a-f]+: 0e5ff400 fcvtn v0.8b, v0.4h, v31.4h
> +[ ]*[0-9a-f]+: 0e40f7ff fcvtn v31.8b, v31.4h, v0.4h
> +[ ]*[0-9a-f]+: 0e5ff7e0 fcvtn v0.8b, v31.4h, v31.4h
> +[ ]*[0-9a-f]+: 0e5ff7ff fcvtn v31.8b, v31.4h, v31.4h
> [ ]*[0-9a-f]+: 4e40f400 fcvtn v0.16b, v0.8h, v0.8h
> -[ ]*[0-9a-f]+: 4e40f401 fcvtn v1.16b, v0.8h, v0.8h
> -[ ]*[0-9a-f]+: 4e40f420 fcvtn v0.16b, v1.8h, v0.8h
> -[ ]*[0-9a-f]+: 4e41f400 fcvtn v0.16b, v0.8h, v1.8h
> -[ ]*[0-9a-f]+: 4e40f421 fcvtn v1.16b, v1.8h, v0.8h
> -[ ]*[0-9a-f]+: 4e41f420 fcvtn v0.16b, v1.8h, v1.8h
> -[ ]*[0-9a-f]+: 4e41f421 fcvtn v1.16b, v1.8h, v1.8h
> -[ ]*[0-9a-f]+: 4e52f630 fcvtn v16.16b, v17.8h, v18.8h
> +[ ]*[0-9a-f]+: 4e40f41f fcvtn v31.16b, v0.8h, v0.8h
> +[ ]*[0-9a-f]+: 4e40f7e0 fcvtn v0.16b, v31.8h, v0.8h
> +[ ]*[0-9a-f]+: 4e5ff400 fcvtn v0.16b, v0.8h, v31.8h
> +[ ]*[0-9a-f]+: 4e40f7ff fcvtn v31.16b, v31.8h, v0.8h
> +[ ]*[0-9a-f]+: 4e5ff7e0 fcvtn v0.16b, v31.8h, v31.8h
> +[ ]*[0-9a-f]+: 4e5ff7ff fcvtn v31.16b, v31.8h, v31.8h
> [ ]*[0-9a-f]+: 0e00f400 fcvtn v0.8b, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 0e00f401 fcvtn v1.8b, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 0e00f420 fcvtn v0.8b, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 0e01f400 fcvtn v0.8b, v0.4s, v1.4s
> -[ ]*[0-9a-f]+: 0e00f421 fcvtn v1.8b, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 0e01f420 fcvtn v0.8b, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 0e01f421 fcvtn v1.8b, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 0e12f630 fcvtn v16.8b, v17.4s, v18.4s
> +[ ]*[0-9a-f]+: 0e00f41f fcvtn v31.8b, v0.4s, v0.4s
> +[ ]*[0-9a-f]+: 0e00f7e0 fcvtn v0.8b, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 0e1ff400 fcvtn v0.8b, v0.4s, v31.4s
> +[ ]*[0-9a-f]+: 0e00f7ff fcvtn v31.8b, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 0e1ff7e0 fcvtn v0.8b, v31.4s, v31.4s
> +[ ]*[0-9a-f]+: 0e1ff7ff fcvtn v31.8b, v31.4s, v31.4s
> [ ]*[0-9a-f]+: 4e00f400 fcvtn2 v0.16b, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 4e00f401 fcvtn2 v1.16b, v0.4s, v0.4s
> -[ ]*[0-9a-f]+: 4e00f420 fcvtn2 v0.16b, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 4e01f400 fcvtn2 v0.16b, v0.4s, v1.4s
> -[ ]*[0-9a-f]+: 4e00f421 fcvtn2 v1.16b, v1.4s, v0.4s
> -[ ]*[0-9a-f]+: 4e01f420 fcvtn2 v0.16b, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 4e01f421 fcvtn2 v1.16b, v1.4s, v1.4s
> -[ ]*[0-9a-f]+: 4e12f630 fcvtn2 v16.16b, v17.4s, v18.4s
> +[ ]*[0-9a-f]+: 4e00f41f fcvtn2 v31.16b, v0.4s, v0.4s
> +[ ]*[0-9a-f]+: 4e00f7e0 fcvtn2 v0.16b, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 4e1ff400 fcvtn2 v0.16b, v0.4s, v31.4s
> +[ ]*[0-9a-f]+: 4e00f7ff fcvtn2 v31.16b, v31.4s, v0.4s
> +[ ]*[0-9a-f]+: 4e1ff7e0 fcvtn2 v0.16b, v31.4s, v31.4s
> +[ ]*[0-9a-f]+: 4e1ff7ff fcvtn2 v31.16b, v31.4s, v31.4s
> diff --git a/gas/testsuite/gas/aarch64/advsimd-fp8.s b/gas/testsuite/gas/aarch64/advsimd-fp8.s
> index e49f38d420a..7f2f38da582 100644
> --- a/gas/testsuite/gas/aarch64/advsimd-fp8.s
> +++ b/gas/testsuite/gas/aarch64/advsimd-fp8.s
> @@ -6,10 +6,9 @@
>
> .macro cvrt_lowerhalf, op
> \op v0.8h, v0.8b
> - \op v1.8h, v0.8b
> - \op v0.8h, v1.8b
> - \op v1.8h, v1.8b
> - \op v16.8h, v17.8b
> + \op v31.8h, v0.8b
> + \op v0.8h, v31.8b
> + \op v31.8h, v31.8b
> .endm
>
> cvrt_lowerhalf bf1cvtl
> @@ -22,10 +21,9 @@
>
> .macro cvrt_upperhalf, op
> \op v0.8h, v0.16b
> - \op v1.8h, v0.16b
> - \op v0.8h, v1.16b
> - \op v1.8h, v1.16b
> - \op v16.8h, v17.16b
> + \op v31.8h, v0.16b
> + \op v0.8h, v31.16b
> + \op v31.8h, v31.16b
> .endm
>
> cvrt_upperhalf bf1cvtl2
> @@ -37,13 +35,13 @@
>
> .macro fscale_gen, op_var
> fscale v0.\op_var, v0.\op_var, v0.\op_var
> - fscale v1.\op_var, v0.\op_var, v0.\op_var
> - fscale v0.\op_var, v1.\op_var, v0.\op_var
> - fscale v0.\op_var, v0.\op_var, v1.\op_var
> - fscale v1.\op_var, v1.\op_var, v0.\op_var
> - fscale v0.\op_var, v1.\op_var, v1.\op_var
> - fscale v1.\op_var, v1.\op_var, v1.\op_var
> - fscale v16.\op_var, v17.\op_var, v18.\op_var
> + fscale v31.\op_var, v0.\op_var, v0.\op_var
> + fscale v0.\op_var, v31.\op_var, v0.\op_var
> + fscale v0.\op_var, v0.\op_var, v31.\op_var
> + fscale v31.\op_var, v31.\op_var, v0.\op_var
> + fscale v0.\op_var, v31.\op_var, v31.\op_var
> + fscale v31.\op_var, v31.\op_var, v0.\op_var
> + fscale v31.\op_var, v31.\op_var, v31.\op_var
> .endm
>
> /* Half-precision variant. */
> @@ -58,13 +56,12 @@
>
> .macro fcvtn_to_fp8, op, sd, ss
> \op v0.\sd, v0.\ss, v0.\ss
> - \op v1.\sd, v0.\ss, v0.\ss
> - \op v0.\sd, v1.\ss, v0.\ss
> - \op v0.\sd, v0.\ss, v1.\ss
> - \op v1.\sd, v1.\ss, v0.\ss
> - \op v0.\sd, v1.\ss, v1.\ss
> - \op v1.\sd, v1.\ss, v1.\ss
> - \op v16.\sd, v17.\ss, v18.\ss
> + \op v31.\sd, v0.\ss, v0.\ss
> + \op v0.\sd, v31.\ss, v0.\ss
> + \op v0.\sd, v0.\ss, v31.\ss
> + \op v31.\sd, v31.\ss, v0.\ss
> + \op v0.\sd, v31.\ss, v31.\ss
> + \op v31.\sd, v31.\ss, v31.\ss
> .endm
>
> /* Half-precision variant. */
> diff --git a/gas/testsuite/gas/aarch64/sme2-fp8.d b/gas/testsuite/gas/aarch64/sme2-fp8.d
> index 8d952d4b8ad..18f3df4cd88 100644
> --- a/gas/testsuite/gas/aarch64/sme2-fp8.d
> +++ b/gas/testsuite/gas/aarch64/sme2-fp8.d
> @@ -6,123 +6,113 @@
> Disassembly of section \.text:
>
> 0+ <.*>:
> -[ ]*[0-9a-f]+: c166e040 bf1cvt {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c166e060 bf1cvt {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c166e080 bf1cvt {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c166e042 bf1cvt {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c166e082 bf1cvt {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c166e3dc bf1cvt {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c1e6e040 bf2cvt {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c166e3fc bf1cvt {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c1e6e060 bf2cvt {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c1e6e080 bf2cvt {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c1e6e042 bf2cvt {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c1e6e082 bf2cvt {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c1e6e3dc bf2cvt {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c166e041 bf1cvtl {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c1e6e3fc bf2cvt {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c166e061 bf1cvtl {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c166e081 bf1cvtl {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c166e043 bf1cvtl {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c166e083 bf1cvtl {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c166e3dd bf1cvtl {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c1e6e041 bf2cvtl {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c166e3fd bf1cvtl {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c1e6e061 bf2cvtl {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c1e6e081 bf2cvtl {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c1e6e043 bf2cvtl {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c1e6e083 bf2cvtl {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c1e6e3dd bf2cvtl {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c126e040 f1cvt {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c1e6e3fd bf2cvtl {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c126e060 f1cvt {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c126e080 f1cvt {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c126e042 f1cvt {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c126e082 f1cvt {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c126e3dc f1cvt {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c1a6e040 f2cvt {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c126e3fc f1cvt {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c1a6e060 f2cvt {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c1a6e080 f2cvt {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c1a6e042 f2cvt {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c1a6e082 f2cvt {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c1a6e3dc f2cvt {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c126e041 f1cvtl {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c1a6e3fc f2cvt {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c126e061 f1cvtl {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c126e081 f1cvtl {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c126e043 f1cvtl {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c126e083 f1cvtl {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c126e3dd f1cvtl {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c1a6e041 f2cvtl {z0.h-z1.h}, z2.b
> +[ ]*[0-9a-f]+: c126e3fd f1cvtl {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c1a6e061 f2cvtl {z0.h-z1.h}, z3.b
> [ ]*[0-9a-f]+: c1a6e081 f2cvtl {z0.h-z1.h}, z4.b
> -[ ]*[0-9a-f]+: c1a6e043 f2cvtl {z2.h-z3.h}, z2.b
> [ ]*[0-9a-f]+: c1a6e083 f2cvtl {z2.h-z3.h}, z4.b
> -[ ]*[0-9a-f]+: c1a6e3dd f2cvtl {z28.h-z29.h}, z30.b
> -[ ]*[0-9a-f]+: c164e002 bfcvt z2.b, {z0.h-z1.h}
> +[ ]*[0-9a-f]+: c1a6e3fd f2cvtl {z28.h-z29.h}, z31.b
> +[ ]*[0-9a-f]+: c164e003 bfcvt z3.b, {z0.h-z1.h}
> [ ]*[0-9a-f]+: c164e004 bfcvt z4.b, {z0.h-z1.h}
> -[ ]*[0-9a-f]+: c164e042 bfcvt z2.b, {z2.h-z3.h}
> [ ]*[0-9a-f]+: c164e044 bfcvt z4.b, {z2.h-z3.h}
> -[ ]*[0-9a-f]+: c164e39e bfcvt z30.b, {z28.h-z29.h}
> -[ ]*[0-9a-f]+: c124e002 fcvt z2.b, {z0.h-z1.h}
> +[ ]*[0-9a-f]+: c164e39f bfcvt z31.b, {z28.h-z29.h}
> +[ ]*[0-9a-f]+: c124e003 fcvt z3.b, {z0.h-z1.h}
> [ ]*[0-9a-f]+: c124e004 fcvt z4.b, {z0.h-z1.h}
> -[ ]*[0-9a-f]+: c124e042 fcvt z2.b, {z2.h-z3.h}
> [ ]*[0-9a-f]+: c124e044 fcvt z4.b, {z2.h-z3.h}
> -[ ]*[0-9a-f]+: c124e39e fcvt z30.b, {z28.h-z29.h}
> -[ ]*[0-9a-f]+: c134e024 fcvtn z4.b, {z0.s-z3.s}
> +[ ]*[0-9a-f]+: c124e39f fcvt z31.b, {z28.h-z29.h}
> +[ ]*[0-9a-f]+: c134e027 fcvtn z7.b, {z0.s-z3.s}
> [ ]*[0-9a-f]+: c134e028 fcvtn z8.b, {z0.s-z3.s}
> -[ ]*[0-9a-f]+: c134e0a4 fcvtn z4.b, {z4.s-z7.s}
> -[ ]*[0-9a-f]+: c134e0a8 fcvtn z8.b, {z4.s-z7.s}
> -[ ]*[0-9a-f]+: c134e33c fcvtn z28.b, {z24.s-z27.s}
> -[ ]*[0-9a-f]+: c134e004 fcvt z4.b, {z0.s-z3.s}
> +[ ]*[0-9a-f]+: c134e0a1 fcvtn z1.b, {z4.s-z7.s}
> +[ ]*[0-9a-f]+: c134e0a2 fcvtn z2.b, {z4.s-z7.s}
> +[ ]*[0-9a-f]+: c134e33f fcvtn z31.b, {z24.s-z27.s}
> +[ ]*[0-9a-f]+: c134e007 fcvt z7.b, {z0.s-z3.s}
> [ ]*[0-9a-f]+: c134e008 fcvt z8.b, {z0.s-z3.s}
> -[ ]*[0-9a-f]+: c134e084 fcvt z4.b, {z4.s-z7.s}
> -[ ]*[0-9a-f]+: c134e088 fcvt z8.b, {z4.s-z7.s}
> -[ ]*[0-9a-f]+: c134e31c fcvt z28.b, {z24.s-z27.s}
> +[ ]*[0-9a-f]+: c134e081 fcvt z1.b, {z4.s-z7.s}
> +[ ]*[0-9a-f]+: c134e082 fcvt z2.b, {z4.s-z7.s}
> +[ ]*[0-9a-f]+: c134e31f fcvt z31.b, {z24.s-z27.s}
> [ ]*[0-9a-f]+: c162a180 fscale {z0.h-z1.h}, {z0.h-z1.h}, z2.h
> [ ]*[0-9a-f]+: c162a182 fscale {z2.h-z3.h}, {z2.h-z3.h}, z2.h
> [ ]*[0-9a-f]+: c164a180 fscale {z0.h-z1.h}, {z0.h-z1.h}, z4.h
> [ ]*[0-9a-f]+: c164a182 fscale {z2.h-z3.h}, {z2.h-z3.h}, z4.h
> -[ ]*[0-9a-f]+: c16fa198 fscale {z24.h-z25.h}, {z24.h-z25.h}, z15.h
> +[ ]*[0-9a-f]+: c16fa19e fscale {z30.h-z31.h}, {z30.h-z31.h}, z15.h
> [ ]*[0-9a-f]+: c164a980 fscale {z0.h-z3.h}, {z0.h-z3.h}, z4.h
> [ ]*[0-9a-f]+: c164a984 fscale {z4.h-z7.h}, {z4.h-z7.h}, z4.h
> [ ]*[0-9a-f]+: c168a980 fscale {z0.h-z3.h}, {z0.h-z3.h}, z8.h
> [ ]*[0-9a-f]+: c168a984 fscale {z4.h-z7.h}, {z4.h-z7.h}, z8.h
> -[ ]*[0-9a-f]+: c16fa998 fscale {z24.h-z27.h}, {z24.h-z27.h}, z15.h
> +[ ]*[0-9a-f]+: c16fa99c fscale {z28.h-z31.h}, {z28.h-z31.h}, z15.h
> [ ]*[0-9a-f]+: c1a2a180 fscale {z0.s-z1.s}, {z0.s-z1.s}, z2.s
> [ ]*[0-9a-f]+: c1a2a182 fscale {z2.s-z3.s}, {z2.s-z3.s}, z2.s
> [ ]*[0-9a-f]+: c1a4a180 fscale {z0.s-z1.s}, {z0.s-z1.s}, z4.s
> [ ]*[0-9a-f]+: c1a4a182 fscale {z2.s-z3.s}, {z2.s-z3.s}, z4.s
> -[ ]*[0-9a-f]+: c1afa198 fscale {z24.s-z25.s}, {z24.s-z25.s}, z15.s
> +[ ]*[0-9a-f]+: c1afa19e fscale {z30.s-z31.s}, {z30.s-z31.s}, z15.s
> [ ]*[0-9a-f]+: c1a4a980 fscale {z0.s-z3.s}, {z0.s-z3.s}, z4.s
> [ ]*[0-9a-f]+: c1a4a984 fscale {z4.s-z7.s}, {z4.s-z7.s}, z4.s
> [ ]*[0-9a-f]+: c1a8a980 fscale {z0.s-z3.s}, {z0.s-z3.s}, z8.s
> [ ]*[0-9a-f]+: c1a8a984 fscale {z4.s-z7.s}, {z4.s-z7.s}, z8.s
> -[ ]*[0-9a-f]+: c1afa998 fscale {z24.s-z27.s}, {z24.s-z27.s}, z15.s
> +[ ]*[0-9a-f]+: c1afa99c fscale {z28.s-z31.s}, {z28.s-z31.s}, z15.s
> [ ]*[0-9a-f]+: c1e2a180 fscale {z0.d-z1.d}, {z0.d-z1.d}, z2.d
> [ ]*[0-9a-f]+: c1e2a182 fscale {z2.d-z3.d}, {z2.d-z3.d}, z2.d
> [ ]*[0-9a-f]+: c1e4a180 fscale {z0.d-z1.d}, {z0.d-z1.d}, z4.d
> [ ]*[0-9a-f]+: c1e4a182 fscale {z2.d-z3.d}, {z2.d-z3.d}, z4.d
> -[ ]*[0-9a-f]+: c1efa198 fscale {z24.d-z25.d}, {z24.d-z25.d}, z15.d
> +[ ]*[0-9a-f]+: c1efa19e fscale {z30.d-z31.d}, {z30.d-z31.d}, z15.d
> [ ]*[0-9a-f]+: c1e4a980 fscale {z0.d-z3.d}, {z0.d-z3.d}, z4.d
> [ ]*[0-9a-f]+: c1e4a984 fscale {z4.d-z7.d}, {z4.d-z7.d}, z4.d
> [ ]*[0-9a-f]+: c1e8a980 fscale {z0.d-z3.d}, {z0.d-z3.d}, z8.d
> [ ]*[0-9a-f]+: c1e8a984 fscale {z4.d-z7.d}, {z4.d-z7.d}, z8.d
> -[ ]*[0-9a-f]+: c1efa998 fscale {z24.d-z27.d}, {z24.d-z27.d}, z15.d
> +[ ]*[0-9a-f]+: c1efa99c fscale {z28.d-z31.d}, {z28.d-z31.d}, z15.d
> [ ]*[0-9a-f]+: c162b180 fscale {z0.h-z1.h}, {z0.h-z1.h}, {z2.h-z3.h}
> [ ]*[0-9a-f]+: c162b182 fscale {z2.h-z3.h}, {z2.h-z3.h}, {z2.h-z3.h}
> [ ]*[0-9a-f]+: c164b180 fscale {z0.h-z1.h}, {z0.h-z1.h}, {z4.h-z5.h}
> [ ]*[0-9a-f]+: c164b182 fscale {z2.h-z3.h}, {z2.h-z3.h}, {z4.h-z5.h}
> -[ ]*[0-9a-f]+: c176b194 fscale {z20.h-z21.h}, {z20.h-z21.h}, {z22.h-z23.h}
> +[ ]*[0-9a-f]+: c17eb19e fscale {z30.h-z31.h}, {z30.h-z31.h}, {z30.h-z31.h}
> [ ]*[0-9a-f]+: c164b980 fscale {z0.h-z3.h}, {z0.h-z3.h}, {z4.h-z7.h}
> [ ]*[0-9a-f]+: c164b984 fscale {z4.h-z7.h}, {z4.h-z7.h}, {z4.h-z7.h}
> [ ]*[0-9a-f]+: c168b980 fscale {z0.h-z3.h}, {z0.h-z3.h}, {z8.h-z11.h}
> [ ]*[0-9a-f]+: c168b984 fscale {z4.h-z7.h}, {z4.h-z7.h}, {z8.h-z11.h}
> -[ ]*[0-9a-f]+: c178b994 fscale {z20.h-z23.h}, {z20.h-z23.h}, {z24.h-z27.h}
> +[ ]*[0-9a-f]+: c178b99c fscale {z28.h-z31.h}, {z28.h-z31.h}, {z24.h-z27.h}
> [ ]*[0-9a-f]+: c1a2b180 fscale {z0.s-z1.s}, {z0.s-z1.s}, {z2.s-z3.s}
> [ ]*[0-9a-f]+: c1a2b182 fscale {z2.s-z3.s}, {z2.s-z3.s}, {z2.s-z3.s}
> [ ]*[0-9a-f]+: c1a4b180 fscale {z0.s-z1.s}, {z0.s-z1.s}, {z4.s-z5.s}
> [ ]*[0-9a-f]+: c1a4b182 fscale {z2.s-z3.s}, {z2.s-z3.s}, {z4.s-z5.s}
> -[ ]*[0-9a-f]+: c1b6b194 fscale {z20.s-z21.s}, {z20.s-z21.s}, {z22.s-z23.s}
> +[ ]*[0-9a-f]+: c1beb19e fscale {z30.s-z31.s}, {z30.s-z31.s}, {z30.s-z31.s}
> [ ]*[0-9a-f]+: c1a4b980 fscale {z0.s-z3.s}, {z0.s-z3.s}, {z4.s-z7.s}
> [ ]*[0-9a-f]+: c1a4b984 fscale {z4.s-z7.s}, {z4.s-z7.s}, {z4.s-z7.s}
> [ ]*[0-9a-f]+: c1a8b980 fscale {z0.s-z3.s}, {z0.s-z3.s}, {z8.s-z11.s}
> [ ]*[0-9a-f]+: c1a8b984 fscale {z4.s-z7.s}, {z4.s-z7.s}, {z8.s-z11.s}
> -[ ]*[0-9a-f]+: c1b8b994 fscale {z20.s-z23.s}, {z20.s-z23.s}, {z24.s-z27.s}
> +[ ]*[0-9a-f]+: c1b8b99c fscale {z28.s-z31.s}, {z28.s-z31.s}, {z24.s-z27.s}
> [ ]*[0-9a-f]+: c1e2b180 fscale {z0.d-z1.d}, {z0.d-z1.d}, {z2.d-z3.d}
> [ ]*[0-9a-f]+: c1e2b182 fscale {z2.d-z3.d}, {z2.d-z3.d}, {z2.d-z3.d}
> [ ]*[0-9a-f]+: c1e4b180 fscale {z0.d-z1.d}, {z0.d-z1.d}, {z4.d-z5.d}
> [ ]*[0-9a-f]+: c1e4b182 fscale {z2.d-z3.d}, {z2.d-z3.d}, {z4.d-z5.d}
> -[ ]*[0-9a-f]+: c1f6b194 fscale {z20.d-z21.d}, {z20.d-z21.d}, {z22.d-z23.d}
> +[ ]*[0-9a-f]+: c1feb19e fscale {z30.d-z31.d}, {z30.d-z31.d}, {z30.d-z31.d}
> [ ]*[0-9a-f]+: c1e4b980 fscale {z0.d-z3.d}, {z0.d-z3.d}, {z4.d-z7.d}
> [ ]*[0-9a-f]+: c1e4b984 fscale {z4.d-z7.d}, {z4.d-z7.d}, {z4.d-z7.d}
> [ ]*[0-9a-f]+: c1e8b980 fscale {z0.d-z3.d}, {z0.d-z3.d}, {z8.d-z11.d}
> [ ]*[0-9a-f]+: c1e8b984 fscale {z4.d-z7.d}, {z4.d-z7.d}, {z8.d-z11.d}
> -[ ]*[0-9a-f]+: c1f8b994 fscale {z20.d-z23.d}, {z20.d-z23.d}, {z24.d-z27.d}
> \ No newline at end of file
> +[ ]*[0-9a-f]+: c1f8b99c fscale {z28.d-z31.d}, {z28.d-z31.d}, {z24.d-z27.d}
> \ No newline at end of file
> diff --git a/gas/testsuite/gas/aarch64/sme2-fp8.s b/gas/testsuite/gas/aarch64/sme2-fp8.s
> index ca2a4b4d20a..6bcfbcee411 100644
> --- a/gas/testsuite/gas/aarch64/sme2-fp8.s
> +++ b/gas/testsuite/gas/aarch64/sme2-fp8.s
> @@ -1,12 +1,11 @@
> - /* sme-fp8.s Test file for AArch64 SME 8-bit floating-point
> + /* sme2-fp8.s Test file for AArch64 SME 8-bit floating-point
> vector instructions. */
>
> .macro cvt_pat1, op
> - \op {z0.h-z1.h}, z2.b
> + \op {z0.h-z1.h}, z3.b
> \op {z0.h-z1.h}, z4.b
> - \op {z2.h-z3.h}, z2.b
> \op {z2.h-z3.h}, z4.b
> - \op {z28.h-z29.h}, z30.b
> + \op {z28.h-z29.h}, z31.b
> .endm
>
> /* Multi-vector floating-point convert from 8-bit floating-point. */
> @@ -28,11 +27,10 @@
> cvt_pat1 f2cvtl
>
> .macro cvt_pat2, op
> - \op z2.b, {z0.h-z1.h}
> + \op z3.b, {z0.h-z1.h}
> \op z4.b, {z0.h-z1.h}
> - \op z2.b, {z2.h-z3.h}
> \op z4.b, {z2.h-z3.h}
> - \op z30.b, {z28.h-z29.h}
> + \op z31.b, {z28.h-z29.h}
> .endm
>
> /* Multi-vector floating-point convert to packed 8-bit floating-point
> @@ -45,11 +43,11 @@
> cvt_pat2 fcvt
>
> .macro cvt_pat3, op
> - \op z4.b, {z0.s-z3.s}
> + \op z7.b, {z0.s-z3.s}
> \op z8.b, {z0.s-z3.s}
> - \op z4.b, {z4.s-z7.s}
> - \op z8.b, {z4.s-z7.s}
> - \op z28.b, {z24.s-z27.s}
> + \op z1.b, {z4.s-z7.s}
> + \op z2.b, {z4.s-z7.s}
> + \op z31.b, {z24.s-z27.s}
> .endm
>
> /* Multi-vector floating-point convert from single-precision to
> @@ -65,13 +63,13 @@
> fscale { z2.\w - z3.\w }, { z2.\w - z3.\w }, z2.\w
> fscale { z0.\w - z1.\w }, { z0.\w - z1.\w }, z4.\w
> fscale { z2.\w - z3.\w }, { z2.\w - z3.\w }, z4.\w
> - fscale { z24.\w-z25.\w }, { z24.\w-z25.\w }, z15.\w
> + fscale { z30.\w-z31.\w }, { z30.\w-z31.\w }, z15.\w
> /* quad. */
> fscale { z0.\w-z3.\w }, { z0.\w-z3.\w }, z4.\w
> fscale { z4.\w-z7.\w }, { z4.\w-z7.\w }, z4.\w
> fscale { z0.\w-z3.\w }, { z0.\w-z3.\w }, z8.\w
> fscale { z4.\w-z7.\w }, { z4.\w-z7.\w }, z8.\w
> - fscale { z24.\w-z27.\w }, { z24.\w-z27.\w }, z15.\w
> + fscale { z28.\w-z31.\w }, { z28.\w-z31.\w }, z15.\w
> .endm
>
> /* Multi-vector floating-point adjust exponent by vector.
> @@ -91,13 +89,13 @@
> fscale { z2.\w - z3.\w }, { z2.\w - z3.\w }, { z2.\w-z3.\w }
> fscale { z0.\w - z1.\w }, { z0.\w - z1.\w }, { z4.\w-z5.\w }
> fscale { z2.\w - z3.\w }, { z2.\w - z3.\w }, { z4.\w-z5.\w }
> - fscale { z20.\w-z21.\w }, { z20.\w-z21.\w }, { z22.\w-z23.\w }
> + fscale { z30.\w-z31.\w }, { z30.\w-z31.\w }, { z30.\w-z31.\w }
> /* quad. */
> fscale { z0.\w-z3.\w }, { z0.\w-z3.\w }, { z4.\w-z7.\w }
> fscale { z4.\w-z7.\w }, { z4.\w-z7.\w }, { z4.\w-z7.\w }
> fscale { z0.\w-z3.\w }, { z0.\w-z3.\w }, { z8.\w-z11.\w }
> fscale { z4.\w-z7.\w }, { z4.\w-z7.\w }, { z8.\w-z11.\w }
> - fscale { z20.\w-z23.\w }, { z20.\w-z23.\w }, { z24.\w-z27.\w }
> + fscale { z28.\w-z31.\w }, { z28.\w-z31.\w }, { z24.\w-z27.\w }
> .endm
>
> /* Multi-vector floating-point adjust exponent.
> diff --git a/gas/testsuite/gas/aarch64/sve2-fp8-dump b/gas/testsuite/gas/aarch64/sve2-fp8-dump
> index 570ff9c4da4..1ea2c3510e8 100644
> --- a/gas/testsuite/gas/aarch64/sve2-fp8-dump
> +++ b/gas/testsuite/gas/aarch64/sve2-fp8-dump
> @@ -3,51 +3,43 @@
> Disassembly of section \.text:
>
> 0+ <.*>:
> -[ ]*[0-9a-f]+: 65083800 bf1cvt z0.h, z0.b
> [ ]*[0-9a-f]+: 65083801 bf1cvt z1.h, z0.b
> [ ]*[0-9a-f]+: 65083820 bf1cvt z0.h, z1.b
> [ ]*[0-9a-f]+: 65083bfe bf1cvt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65083c00 bf2cvt z0.h, z0.b
> [ ]*[0-9a-f]+: 65083c01 bf2cvt z1.h, z0.b
> [ ]*[0-9a-f]+: 65083c20 bf2cvt z0.h, z1.b
> [ ]*[0-9a-f]+: 65083ffe bf2cvt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65093800 bf1cvtlt z0.h, z0.b
> [ ]*[0-9a-f]+: 65093801 bf1cvtlt z1.h, z0.b
> [ ]*[0-9a-f]+: 65093820 bf1cvtlt z0.h, z1.b
> [ ]*[0-9a-f]+: 65093bfe bf1cvtlt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65093c00 bf2cvtlt z0.h, z0.b
> [ ]*[0-9a-f]+: 65093c01 bf2cvtlt z1.h, z0.b
> [ ]*[0-9a-f]+: 65093c20 bf2cvtlt z0.h, z1.b
> [ ]*[0-9a-f]+: 65093ffe bf2cvtlt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65083000 f1cvt z0.h, z0.b
> [ ]*[0-9a-f]+: 65083001 f1cvt z1.h, z0.b
> [ ]*[0-9a-f]+: 65083020 f1cvt z0.h, z1.b
> [ ]*[0-9a-f]+: 650833fe f1cvt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65083400 f2cvt z0.h, z0.b
> [ ]*[0-9a-f]+: 65083401 f2cvt z1.h, z0.b
> [ ]*[0-9a-f]+: 65083420 f2cvt z0.h, z1.b
> [ ]*[0-9a-f]+: 650837fe f2cvt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65093000 f1cvtlt z0.h, z0.b
> [ ]*[0-9a-f]+: 65093001 f1cvtlt z1.h, z0.b
> [ ]*[0-9a-f]+: 65093020 f1cvtlt z0.h, z1.b
> [ ]*[0-9a-f]+: 650933fe f1cvtlt z30.h, z31.b
> -[ ]*[0-9a-f]+: 65093400 f2cvtlt z0.h, z0.b
> [ ]*[0-9a-f]+: 65093401 f2cvtlt z1.h, z0.b
> [ ]*[0-9a-f]+: 65093420 f2cvtlt z0.h, z1.b
> [ ]*[0-9a-f]+: 650937fe f2cvtlt z30.h, z31.b
> [ ]*[0-9a-f]+: 650a3800 bfcvtn z0.b, {z0.h-z1.h}
> -[ ]*[0-9a-f]+: 650a3801 bfcvtn z1.b, {z0.h-z1.h}
> +[ ]*[0-9a-f]+: 650a3804 bfcvtn z4.b, {z0.h-z1.h}
> [ ]*[0-9a-f]+: 650a3840 bfcvtn z0.b, {z2.h-z3.h}
> -[ ]*[0-9a-f]+: 650a3bdd bfcvtn z29.b, {z30.h-z31.h}
> +[ ]*[0-9a-f]+: 650a3b9b bfcvtn z27.b, {z28.h-z29.h}
> [ ]*[0-9a-f]+: 650a3000 fcvtn z0.b, {z0.h-z1.h}
> -[ ]*[0-9a-f]+: 650a3001 fcvtn z1.b, {z0.h-z1.h}
> +[ ]*[0-9a-f]+: 650a3004 fcvtn z4.b, {z0.h-z1.h}
> [ ]*[0-9a-f]+: 650a3040 fcvtn z0.b, {z2.h-z3.h}
> -[ ]*[0-9a-f]+: 650a33dd fcvtn z29.b, {z30.h-z31.h}
> +[ ]*[0-9a-f]+: 650a339b fcvtn z27.b, {z28.h-z29.h}
> [ ]*[0-9a-f]+: 650a3400 fcvtnb z0.b, {z0.s-z1.s}
> -[ ]*[0-9a-f]+: 650a3401 fcvtnb z1.b, {z0.s-z1.s}
> +[ ]*[0-9a-f]+: 650a3404 fcvtnb z4.b, {z0.s-z1.s}
> [ ]*[0-9a-f]+: 650a3440 fcvtnb z0.b, {z2.s-z3.s}
> -[ ]*[0-9a-f]+: 650a37dd fcvtnb z29.b, {z30.s-z31.s}
> +[ ]*[0-9a-f]+: 650a379b fcvtnb z27.b, {z28.s-z29.s}
> [ ]*[0-9a-f]+: 650a3c00 fcvtnt z0.b, {z0.s-z1.s}
> -[ ]*[0-9a-f]+: 650a3c01 fcvtnt z1.b, {z0.s-z1.s}
> +[ ]*[0-9a-f]+: 650a3c04 fcvtnt z4.b, {z0.s-z1.s}
> [ ]*[0-9a-f]+: 650a3c40 fcvtnt z0.b, {z2.s-z3.s}
> -[ ]*[0-9a-f]+: 650a3fdd fcvtnt z29.b, {z30.s-z31.s}
> \ No newline at end of file
> +[ ]*[0-9a-f]+: 650a3f9b fcvtnt z27.b, {z28.s-z29.s}
> diff --git a/gas/testsuite/gas/aarch64/sve2-fp8.s b/gas/testsuite/gas/aarch64/sve2-fp8.s
> index 62dee7334cc..fa371b9a11a 100644
> --- a/gas/testsuite/gas/aarch64/sve2-fp8.s
> +++ b/gas/testsuite/gas/aarch64/sve2-fp8.s
> @@ -2,7 +2,6 @@
> instructions. */
>
> .macro cvt_pat1, op
> - \op z0.h, z0.b
> \op z1.h, z0.b
> \op z0.h, z1.b
> \op z30.h, z31.b
> @@ -10,9 +9,9 @@
>
> .macro cvt_pat2, op, width
> \op z0.b, { z0.\width - z1.\width }
> - \op z1.b, { z0.\width - z1.\width }
> + \op z4.b, { z0.\width - z1.\width }
> \op z0.b, { z2.\width - z3.\width }
> - \op z29.b, { z30.\width - z31.\width }
> + \op z27.b, { z28.\width - z29.\width }
> .endm
>
> /* 8-bit floating-point convert to BFloat16 (top/bottom) with scaling by
> diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
> index 35d9e5cf44a..b6bdecc6947 100644
> --- a/opcodes/aarch64-tbl.h
> +++ b/opcodes/aarch64-tbl.h
> @@ -2450,13 +2450,13 @@
> }
>
> /* e.g. BF1CVTL <Vd>.8H, <Vn>.8B. */
> -#define QL_V2FP8B8H \
> +#define QL_V2_HB_LOWER \
> { \
> QLF2(V_8H, V_8B), \
> }
>
> /* e.g. BF1CVTL2 <Vd>.8H, <Vn>.16B. */
> -#define QL_V28H16B \
> +#define QL_V2_HB_FULL \
> { \
> QLF2(V_8H, V_16B), \
> }
> @@ -6657,17 +6657,17 @@ const struct aarch64_opcode aarch64_opcode_table[] =
> SVE2p1_INSNC("st2q",0xe4600000, 0xffe0e000, sve_misc, 0, OP3 (SME_Zt2, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0),
> SVE2p1_INSNC("st3q",0xe4a00000, 0xffe0e000, sve_misc, 0, OP3 (SME_Zt3, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0),
> SVE2p1_INSNC("st4q",0xe4e00000, 0xffe0e000, sve_misc, 0, OP3 (SME_Zt4, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0),
> - FP8_INSN("bf1cvtl", 0x2ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2FP8B8H, 0),
> - FP8_INSN("bf1cvtl2", 0x6ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V28H16B, 0),
> - FP8_INSN("bf2cvtl", 0x2ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2FP8B8H, 0),
> - FP8_INSN("bf2cvtl2", 0x6ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V28H16B, 0),
> - FP8_INSN("f1cvtl", 0x2e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2FP8B8H, 0),
> - FP8_INSN("f1cvtl2", 0x6e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V28H16B, 0),
> - FP8_INSN("f2cvtl", 0x2e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2FP8B8H, 0),
> - FP8_INSN("f2cvtl2", 0x6e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V28H16B, 0),
> - FP8_INSN("fcvtn", 0xe00f400, 0xffe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3_BSS_LOWER, 0),
> + FP8_INSN("bf1cvtl", 0x2ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2_HB_LOWER, 0),
> + FP8_INSN("bf1cvtl2", 0x6ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn),QL_V2_HB_FULL, 0),
> + FP8_INSN("bf2cvtl", 0x2ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2_HB_LOWER, 0),
> + FP8_INSN("bf2cvtl2", 0x6ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn),QL_V2_HB_FULL, 0),
> + FP8_INSN("f1cvtl", 0x2e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2_HB_LOWER, 0),
> + FP8_INSN("f1cvtl2", 0x6e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn),QL_V2_HB_FULL, 0),
> + FP8_INSN("f2cvtl", 0x2e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), QL_V2_HB_LOWER, 0),
> + FP8_INSN("f2cvtl2", 0x6e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn),QL_V2_HB_FULL, 0),
> + FP8_INSN("fcvtn", 0x0e00f400, 0xffe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3_BSS_LOWER, 0),
> FP8_INSN("fcvtn2", 0x4e00f400, 0xffe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3_BSS_FULL, 0),
> - FP8_INSN("fcvtn", 0xe40f400, 0xbfe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3_BHH, F_SIZEQ),
> + FP8_INSN("fcvtn", 0x0e40f400, 0xbfe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3_BHH, F_SIZEQ),
> FP8_INSN("fscale", 0x2ec03c00, 0xbfe0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_VSHIFT_H, F_SIZEQ),
> FP8_INSN("fscale", 0x2ea0fc00, 0xbfa0fc00, asimdmisc, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ),
> FP8_SVE2_INSN ("bf1cvt", 0x65083800, 0xfffffc00, sve_misc, 0, OP2 (SVE_Zd, SVE_Zn), OP_SVE_HB, 0, 0),
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