[PATCH 2/2] aarch64: Treat operand ADDR_SIMPLE as address with base register

Jens Remus jremus@linux.ibm.com
Fri Jun 21 15:50:13 GMT 2024


The AArch64 instruction table (aarch64-tbl.h) defines the operand
ADDR_SIMPLE as "address with base register (no offset)". During assembly
it is correctly encoded as address with base register (addr.base_regno)
in parse_operands. In warn_unpredictable_ldst it is erroneously treated
as register number (reg.regno).

This resolves the assembler test case "Diagnostics Quality" to
erroneously fail when changing the union in struct aarch64_opnd_info
from union to struct for debugging purposes.

gas/
	* config/tc-aarch64.c: Treat operand ADDR_SIMPLE as address with
	base register.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---

Notes (jremus):
    I ran into two issues where union members of struct aarch64_opnd_info
    were erroneously used interchangeably:
    - https://sourceware.org/PR31561
    - https://sourceware.org/PR31919
    
    This got me the idea to change the union to struct for debugging
    purposes to check whether there were further instances.

 gas/config/tc-aarch64.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 885ea65b8eb0..ed238a05c9fc 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8415,7 +8415,7 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str)
 		  (_("unpredictable: identical transfer and status registers"
 		     " --`%s'"),str);
 
-	      if (opnds[0].reg.regno == opnds[2].reg.regno)
+	      if (opnds[0].reg.regno == opnds[2].addr.base_regno)
 		{
 		  if (!(opcode->opcode & (1 << 21)))
 	            /*  Store-Exclusive is unpredictable if Rn == Rs.  */
@@ -8432,8 +8432,8 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str)
 
 	      /* Store-Exclusive pair is unpredictable if Rn == Rs.  */
 	      if ((opcode->opcode & (1 << 21))
-		  && opnds[0].reg.regno == opnds[3].reg.regno
-		  && opnds[3].reg.regno != REG_SP)
+		  && opnds[0].reg.regno == opnds[3].addr.base_regno
+		  && opnds[3].addr.base_regno != REG_SP)
 		as_warn (_("unpredictable: identical base and status registers"
 			   " --`%s'"),str);
 	    }
-- 
2.40.1



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