[PATCH v4 1/2] gas, aarch64: Add SME2 lutv2 extension

[Richard Earnshaw (lists)]

On 14/06/2024 15:13, saurabh.jha@arm.com wrote:
> 
> Introduces instructions for the SME2 lutv2 extension for AArch64. They
> are documented in the following links:
> 
> * https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions/LUTI4--four-registers--8-bit---Lookup-table-read-with-4-bit-indexes-and-8-bit-elements-?lang=en
> * https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions/MOVT--vector-to-table---Move-vector-register-to-ZT0-?lang=en
> 
> For both luti4 instructions, we introduced an operand called
> SME_Znx2_BIT_INDEX. We use the existing function parse_vector_reg_list
> for parsing but modified that function so that it can accept operands
> without qualifiers and rejects instructions that have operands with
> qualifiers but are not supposed to have operands with qualifiers.
> For disassembly, we modified print_register_list so that it could
> accept register lists without qualifiers.
> 
> For one luti4 instruction, we introduced a SME_Zdnx4_STRIDED. It is
> similar to SME_Ztx4_STRIDED and we could use existing code for parsing,
> encoding, and disassembly.
> 
> For movt instruction, we introduced an operand called SME_ZT0_INDEX2_12.
> This is a ZT0 register with a bit index encoded in [13:12]. It is
> similar to SME_ZT0_INDEX.
> 
> We also introduced an iclass named sme_size_12_b so that we can encode
> size bits [13:12] correctly when only 'b' is allowed as qualifier.
> ---
> Hi,
> 
> Regression tested for aarch64-none-elf and found no regressions.
> 
> Ok for binutils-master? I don't have commit access so can someone please
> commit on my behalf?
> 
> Regards,
> Saurabh
> ---
>  gas/NEWS                                      |  2 +
>  gas/config/tc-aarch64.c                       | 91 +++++++++++++++++-
>  gas/doc/c-aarch64.texi                        |  2 +
>  gas/testsuite/gas/aarch64/sme2-8-invalid.l    | 14 +--
>  gas/testsuite/gas/aarch64/sme2-lutv2-bad.d    |  3 +
>  gas/testsuite/gas/aarch64/sme2-lutv2-bad.l    | 15 +++
>  .../gas/aarch64/sme2-lutv2-illegal.d          |  3 +
>  .../gas/aarch64/sme2-lutv2-illegal.l          | 70 ++++++++++++++
>  .../gas/aarch64/sme2-lutv2-illegal.s          | 95 +++++++++++++++++++
>  gas/testsuite/gas/aarch64/sme2-lutv2.d        | 24 +++++
>  gas/testsuite/gas/aarch64/sme2-lutv2.s        | 22 +++++
>  include/opcode/aarch64.h                      |  6 ++
>  opcodes/aarch64-asm.c                         |  1 +
>  opcodes/aarch64-dis.c                         |  6 ++
>  opcodes/aarch64-opc.c                         | 30 +++++-
>  opcodes/aarch64-opc.h                         |  2 +
>  opcodes/aarch64-tbl.h                         | 33 +++++++
>  17 files changed, 405 insertions(+), 14 deletions(-)
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-bad.d
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-bad.l
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.d
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.s
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2.d
>  create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2.s
> 

--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c

+  if (!skip_past_comma(str))
+      return true;
+
+  if (!parse_shift(str, operand, mode))
+    return false;


+	case AARCH64_OPND_SME_ZT0_INDEX2_12:
+	  po_misc_or_fail(parse_shifter_zt0_with_bit_index

Space after function name before open parenthesis.

There may be other instances of this that I haven't recorded here, please can you double check?

Apart from that, this looks OK.

R.