[PATCH 1/6] x86: optimize left-shift-by-1

[Jiang, Haochen]

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 14, 2024 8:12 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Cui, Lili <lili.cui@intel.com>
> Subject: [PATCH 1/6] x86: optimize left-shift-by-1
> 
> These can be replaced by adds when acting on a register operand.
> 
> While for the scalar forms there's no gain in encoding size, ADD
> generally has higher throughput than SHL. Eflags set by ADD are a
> superset of those set by SHL (AF in particular is undefined there).
> 
> For the SIMD cases the transformation also reduced code size, by
> eliminating the 1-byte immediate from the resulting encoding. Note
> that this transformation is not applied by gcc13 (according to my
> observations), so would - as of now - even improve compiler generated
> code.
> 

Hi Jan,

It is a good optimization, but I suppose it should be a compiler optimization
rather than assembler optimization.

Actually GCC should have done the optimization for most of the cases. It seems
like a optimization miss for compiler for this exact case.

Thx,
Haochen