[PATCH v1] RISC-V: Add support for Zimop extension

Jin Ma jinma@linux.alibaba.com
Fri Jun 14 06:42:06 GMT 2024


> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index ae14e14d427..a6d7e4b24e2 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -2360,6 +2360,87 @@
>  #define MASK_C_NTL_S1 0xffff
>  #define MATCH_C_NTL_ALL 0x9016
>  #define MASK_C_NTL_ALL 0xffff
> +/* Zimop instructions.  */
> +#define MATCH_MOP_R_0 0x81c04073
> +#define MASK_MOP_R_0 0xfff0707f
> +#define MATCH_MOP_R_1 0x81d04073
> +#define MASK_MOP_R_1 0xfff0707f
> +#define MATCH_MOP_R_2 0x81e04073
> +#define MASK_MOP_R_2 0xfff0707f
> +#define MATCH_MOP_R_3 0x81f04073
> +#define MASK_MOP_R_3 0xfff0707f
> +#define MATCH_MOP_R_4 0x85c04073
> +#define MASK_MOP_R_4 0xfff0707f
> +#define MATCH_MOP_R_5 0x85d04073
> +#define MASK_MOP_R_5 0xfff0707f
> +#define MATCH_MOP_R_6 0x85e04073
> +#define MASK_MOP_R_6 0xfff0707f
> +#define MATCH_MOP_R_7 0x85f04073
> +#define MASK_MOP_R_7 0xfff0707f
> +#define MATCH_MOP_R_8 0x89c04073
> +#define MASK_MOP_R_8 0xfff0707f
> +#define MATCH_MOP_R_9 0x89d04073
> +#define MASK_MOP_R_9 0xfff0707f
> +#define MATCH_MOP_R_10 0x89e04073
> +#define MASK_MOP_R_10 0xfff0707f
> +#define MATCH_MOP_R_11 0x89f04073
> +#define MASK_MOP_R_11 0xfff0707f
> +#define MATCH_MOP_R_12 0x8dc04073
> +#define MASK_MOP_R_12 0xfff0707f
> +#define MATCH_MOP_R_13 0x8dd04073
> +#define MASK_MOP_R_13 0xfff0707f
> +#define MATCH_MOP_R_14 0x8de04073
> +#define MASK_MOP_R_14 0xfff0707f
> +#define MATCH_MOP_R_15 0x8df04073
> +#define MASK_MOP_R_15 0xfff0707f
> +#define MATCH_MOP_R_16 0xc1c04073
> +#define MASK_MOP_R_16 0xfff0707f
> +#define MATCH_MOP_R_17 0xc1d04073
> +#define MASK_MOP_R_17 0xfff0707f
> +#define MATCH_MOP_R_18 0xc1e04073
> +#define MASK_MOP_R_18 0xfff0707f
> +#define MATCH_MOP_R_19 0xc1f04073
> +#define MASK_MOP_R_19 0xfff0707f
> +#define MATCH_MOP_R_20 0xc5c04073
> +#define MASK_MOP_R_20 0xfff0707f
> +#define MATCH_MOP_R_21 0xc5d04073
> +#define MASK_MOP_R_21 0xfff0707f
> +#define MATCH_MOP_R_22 0xc5e04073
> +#define MASK_MOP_R_22 0xfff0707f
> +#define MATCH_MOP_R_23 0xc5f04073
> +#define MASK_MOP_R_23 0xfff0707f
> +#define MATCH_MOP_R_24 0xc9c04073
> +#define MASK_MOP_R_24 0xfff0707f
> +#define MATCH_MOP_R_25 0xc9d04073
> +#define MASK_MOP_R_25 0xfff0707f
> +#define MATCH_MOP_R_26 0xc9e04073
> +#define MASK_MOP_R_26 0xfff0707f
> +#define MATCH_MOP_R_27 0xc9f04073
> +#define MASK_MOP_R_27 0xfff0707f
> +#define MATCH_MOP_R_28 0xcdc04073
> +#define MASK_MOP_R_28 0xfff0707f
> +#define MATCH_MOP_R_29 0xcdd04073
> +#define MASK_MOP_R_29 0xfff0707f
> +#define MATCH_MOP_R_30 0xcde04073
> +#define MASK_MOP_R_30 0xfff0707f
> +#define MATCH_MOP_R_31 0xcdf04073
> +#define MASK_MOP_R_31 0xfff0707f
> +#define MATCH_MOP_RR_0 0x82004073
> +#define MASK_MOP_RR_0 0xfe00707f
> +#define MATCH_MOP_RR_1 0x86004073
> +#define MASK_MOP_RR_1 0xfe00707f
> +#define MATCH_MOP_RR_2 0x8a004073
> +#define MASK_MOP_RR_2 0xfe00707f
> +#define MATCH_MOP_RR_3 0x8e004073
> +#define MASK_MOP_RR_3 0xfe00707f
> +#define MATCH_MOP_RR_4 0xc2004073
> +#define MASK_MOP_RR_4 0xfe00707f
> +#define MATCH_MOP_RR_5 0xc6004073
> +#define MASK_MOP_RR_5 0xfe00707f
> +#define MATCH_MOP_RR_6 0xca004073
> +#define MASK_MOP_RR_6 0xfe00707f
> +#define MATCH_MOP_RR_7 0xce004073
> +#define MASK_MOP_RR_7 0xfe00707f

Might it be better to remove the redundant MASK_MOP_R_* and MASK_MOP_RR*?
Because they are all the same value.


>  /* Zawrs instructions.  */
>  #define MATCH_WRS_NTO 0x00d00073
>  #define MASK_WRS_NTO 0xffffffff
> @@ -3909,6 +3990,47 @@ DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1)
>  DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL)
>  DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1)
>  DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL)
> +/* Zimop instructions.  */
> +DECLARE_INSN(MOP_R_0, MATCH_MOP_R_0, MASK_MOP_R_0)
> +DECLARE_INSN(MOP_R_1, MATCH_MOP_R_1, MASK_MOP_R_1)
> +DECLARE_INSN(MOP_R_2, MATCH_MOP_R_2, MASK_MOP_R_2)
> +DECLARE_INSN(MOP_R_3, MATCH_MOP_R_3, MASK_MOP_R_3)
> +DECLARE_INSN(MOP_R_4, MATCH_MOP_R_4, MASK_MOP_R_4)
> +DECLARE_INSN(MOP_R_5, MATCH_MOP_R_5, MASK_MOP_R_5)
> +DECLARE_INSN(MOP_R_6, MATCH_MOP_R_6, MASK_MOP_R_6)
> +DECLARE_INSN(MOP_R_7, MATCH_MOP_R_7, MASK_MOP_R_7)
> +DECLARE_INSN(MOP_R_8, MATCH_MOP_R_8, MASK_MOP_R_8)
> +DECLARE_INSN(MOP_R_9, MATCH_MOP_R_9, MASK_MOP_R_9)
> +DECLARE_INSN(MOP_R_10, MATCH_MOP_R_10, MASK_MOP_R_10)
> +DECLARE_INSN(MOP_R_11, MATCH_MOP_R_11, MASK_MOP_R_11)
> +DECLARE_INSN(MOP_R_12, MATCH_MOP_R_12, MASK_MOP_R_12)
> +DECLARE_INSN(MOP_R_13, MATCH_MOP_R_13, MASK_MOP_R_13)
> +DECLARE_INSN(MOP_R_14, MATCH_MOP_R_14, MASK_MOP_R_14)
> +DECLARE_INSN(MOP_R_15, MATCH_MOP_R_15, MASK_MOP_R_15)
> +DECLARE_INSN(MOP_R_16, MATCH_MOP_R_16, MASK_MOP_R_16)
> +DECLARE_INSN(MOP_R_17, MATCH_MOP_R_17, MASK_MOP_R_17)
> +DECLARE_INSN(MOP_R_18, MATCH_MOP_R_18, MASK_MOP_R_18)
> +DECLARE_INSN(MOP_R_19, MATCH_MOP_R_19, MASK_MOP_R_19)
> +DECLARE_INSN(MOP_R_20, MATCH_MOP_R_20, MASK_MOP_R_20)
> +DECLARE_INSN(MOP_R_21, MATCH_MOP_R_21, MASK_MOP_R_21)
> +DECLARE_INSN(MOP_R_22, MATCH_MOP_R_22, MASK_MOP_R_22)
> +DECLARE_INSN(MOP_R_23, MATCH_MOP_R_23, MASK_MOP_R_23)
> +DECLARE_INSN(MOP_R_24, MATCH_MOP_R_24, MASK_MOP_R_24)
> +DECLARE_INSN(MOP_R_25, MATCH_MOP_R_25, MASK_MOP_R_25)
> +DECLARE_INSN(MOP_R_26, MATCH_MOP_R_26, MASK_MOP_R_26)
> +DECLARE_INSN(MOP_R_27, MATCH_MOP_R_27, MASK_MOP_R_27)
> +DECLARE_INSN(MOP_R_28, MATCH_MOP_R_28, MASK_MOP_R_28)
> +DECLARE_INSN(MOP_R_29, MATCH_MOP_R_29, MASK_MOP_R_29)
> +DECLARE_INSN(MOP_R_30, MATCH_MOP_R_30, MASK_MOP_R_30)
> +DECLARE_INSN(MOP_R_31, MATCH_MOP_R_31, MASK_MOP_R_31)
> +DECLARE_INSN(MOP_RR_0, MATCH_MOP_RR_0, MASK_MOP_RR_0)
> +DECLARE_INSN(MOP_RR_1, MATCH_MOP_RR_1, MASK_MOP_RR_1)
> +DECLARE_INSN(MOP_RR_2, MATCH_MOP_RR_2, MASK_MOP_RR_2)
> +DECLARE_INSN(MOP_RR_3, MATCH_MOP_RR_3, MASK_MOP_RR_3)
> +DECLARE_INSN(MOP_RR_4, MATCH_MOP_RR_4, MASK_MOP_RR_4)
> +DECLARE_INSN(MOP_RR_5, MATCH_MOP_RR_5, MASK_MOP_RR_5)
> +DECLARE_INSN(MOP_RR_6, MATCH_MOP_RR_6, MASK_MOP_RR_6)
> +DECLARE_INSN(MOP_RR_7, MATCH_MOP_RR_7, MASK_MOP_RR_7)

Might not need these?

>  /* Zawrs instructions.  */
>  DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO)
>  DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO)
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index d967b78f706..2434810c26e 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -435,6 +435,7 @@ enum riscv_insn_class
>    INSN_CLASS_ZIHINTNTL,
>    INSN_CLASS_ZIHINTNTL_AND_C,
>    INSN_CLASS_ZIHINTPAUSE,
> +  INSN_CLASS_ZIMOP,
>    INSN_CLASS_ZMMUL,
>    INSN_CLASS_ZAWRS,
>    INSN_CLASS_F_INX,
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index 38a4624da7e..f78ca18a6ee 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -1085,6 +1085,48 @@ const struct riscv_opcode riscv_opcodes[] =
>  {"czero.eqz",  0, INSN_CLASS_ZICOND, "d,s,t", MATCH_CZERO_EQZ, MASK_CZERO_EQZ, match_opcode, 0 },
>  {"czero.nez",  0, INSN_CLASS_ZICOND, "d,s,t", MATCH_CZERO_NEZ, MASK_CZERO_NEZ, match_opcode, 0 },
>  
> +/* Zimop instructions.  */
> +{"mop.r.0",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_0,  MASK_MOP_R_0,  match_opcode, 0 },
> +{"mop.r.1",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_1,  MASK_MOP_R_1,  match_opcode, 0 },
> +{"mop.r.2",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_2,  MASK_MOP_R_2,  match_opcode, 0 },
> +{"mop.r.3",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_3,  MASK_MOP_R_3,  match_opcode, 0 },
> +{"mop.r.4",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_4,  MASK_MOP_R_4,  match_opcode, 0 },
> +{"mop.r.5",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_5,  MASK_MOP_R_5,  match_opcode, 0 },
> +{"mop.r.6",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_6,  MASK_MOP_R_6,  match_opcode, 0 },
> +{"mop.r.7",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_7,  MASK_MOP_R_7,  match_opcode, 0 },
> +{"mop.r.8",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_8,  MASK_MOP_R_8,  match_opcode, 0 },
> +{"mop.r.9",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_9,  MASK_MOP_R_9,  match_opcode, 0 },
> +{"mop.r.10",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_10, MASK_MOP_R_10, match_opcode, 0 },
> +{"mop.r.11",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_11, MASK_MOP_R_11, match_opcode, 0 },
> +{"mop.r.12",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_12, MASK_MOP_R_12, match_opcode, 0 },
> +{"mop.r.13",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_13, MASK_MOP_R_13, match_opcode, 0 },
> +{"mop.r.14",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_14, MASK_MOP_R_14, match_opcode, 0 },
> +{"mop.r.15",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_15, MASK_MOP_R_15, match_opcode, 0 },
> +{"mop.r.16",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_16, MASK_MOP_R_16, match_opcode, 0 },
> +{"mop.r.17",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_17, MASK_MOP_R_17, match_opcode, 0 },
> +{"mop.r.18",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_18, MASK_MOP_R_18, match_opcode, 0 },
> +{"mop.r.19",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_19, MASK_MOP_R_19, match_opcode, 0 },
> +{"mop.r.20",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_20, MASK_MOP_R_20, match_opcode, 0 },
> +{"mop.r.21",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_21, MASK_MOP_R_21, match_opcode, 0 },
> +{"mop.r.22",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_22, MASK_MOP_R_22, match_opcode, 0 },
> +{"mop.r.23",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_23, MASK_MOP_R_23, match_opcode, 0 },
> +{"mop.r.24",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_24, MASK_MOP_R_24, match_opcode, 0 },
> +{"mop.r.25",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_25, MASK_MOP_R_25, match_opcode, 0 },
> +{"mop.r.26",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_26, MASK_MOP_R_26, match_opcode, 0 },
> +{"mop.r.27",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_27, MASK_MOP_R_27, match_opcode, 0 },
> +{"mop.r.28",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_28, MASK_MOP_R_28, match_opcode, 0 },
> +{"mop.r.29",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_29, MASK_MOP_R_29, match_opcode, 0 },
> +{"mop.r.30",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_30, MASK_MOP_R_30, match_opcode, 0 },
> +{"mop.r.31",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_31, MASK_MOP_R_31, match_opcode, 0 },
> +{"mop.rr.0",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_0, MASK_MOP_RR_0, match_opcode, 0 },
> +{"mop.rr.1",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_1, MASK_MOP_RR_1, match_opcode, 0 },
> +{"mop.rr.2",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_2, MASK_MOP_RR_2, match_opcode, 0 },
> +{"mop.rr.3",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_3, MASK_MOP_RR_3, match_opcode, 0 },
> +{"mop.rr.4",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_4, MASK_MOP_RR_4, match_opcode, 0 },
> +{"mop.rr.5",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_5, MASK_MOP_RR_5, match_opcode, 0 },
> +{"mop.rr.6",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_6, MASK_MOP_RR_6, match_opcode, 0 },
> +{"mop.rr.7",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_7, MASK_MOP_RR_7, match_opcode, 0 },
> +
>  /* Zawrs instructions.  */
>  {"wrs.nto",    0, INSN_CLASS_ZAWRS, "", MATCH_WRS_NTO, MASK_WRS_NTO, match_opcode, 0 },
>  {"wrs.sto",    0, INSN_CLASS_ZAWRS, "", MATCH_WRS_STO, MASK_WRS_STO, match_opcode, 0 },

I noticed that Lyut submitted a similar patch last year, and I think he may have more suggestions.

Ref:
https://sourceware.org/pipermail/binutils/2023-December/131046.html

BR,
Jin


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