[PATCH 2/2] Adding missing MIPS Allegrex instruction

[YunQiang Su]

YunQiang Su <wzssyqa@gmail.com> 于2024年4月2日周二 19:46写道：
>
> <david@davidgf.es> 于2023年6月23日周五 07:26写道：
> >
> > From: David Guillen Fandos <david@davidgf.net>
> >
> > ---
> >  opcodes/mips-opc.c                | 2 +-
> >  gas/testsuite/gas/mips/allegrex.s | 1 +
> >  gas/testsuite/gas/mips/allegrex.d | 3 ++-
> >  3 files changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
> > index 39833cd45f..4e0c58d600 100644
> > --- a/opcodes/mips-opc.c
> > +++ b/opcodes/mips-opc.c
> > @@ -1030,7 +1030,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
> >  {"daddu",              "d,v,t",        0x0000002d, 0xfc0007ff, WR_1|RD_2|RD_3,         0,              I3,             0,      0 },
> >  {"daddu",              "t,r,I",        0,    (int) M_DADDU_I,  INSN_MACRO,             0,              I3,             0,      0 },
> >  {"daddwc",             "d,s,t",        0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0,          XLR,            0,      0 },
> > -{"dbreak",             "",             0x7000003f, 0xffffffff, 0,                      0,              N5,             0,      0 },
> > +{"dbreak",             "",             0x7000003f, 0xffffffff, 0,                      0,              N5|AL,          0,      0 },
>
> This is the only instruction changed in this patch.
> I think that we may use a more detailed commit msg, such as:
>
>       MIPS/Allegrex: Enable dbreak instruction
>

Pushed with this subject.

> Or something else.
>
> For the code, LGTM.
>
> >  {"dclo",               "d,s",          0x00000053, 0xfc1f07ff, WR_1|RD_2,              0,              I69,            0,      0 },
> >  {"dclo",               "U,s",          0x70000025, 0xfc0007ff, WR_1|RD_2,      0,              I64|N55,        0,      I69 },
> >  {"dclz",               "d,s",          0x00000052, 0xfc1f07ff, WR_1|RD_2,              0,              I69,            0,      0 },
> > diff --git a/gas/testsuite/gas/mips/allegrex.s b/gas/testsuite/gas/mips/allegrex.s
> > index c36745882d..df05f97ee4 100644
> > --- a/gas/testsuite/gas/mips/allegrex.s
> > +++ b/gas/testsuite/gas/mips/allegrex.s
> > @@ -40,6 +40,7 @@
> >         mfdr    $v0, $0
> >         mfdr    $v0, $1
> >         mtdr    $v1, $1
> > +       dbreak
> >         dret
> >
> >  # Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
> > diff --git a/gas/testsuite/gas/mips/allegrex.d b/gas/testsuite/gas/mips/allegrex.d
> > index d0f79671de..b535c6dbdc 100644
> > --- a/gas/testsuite/gas/mips/allegrex.d
> > +++ b/gas/testsuite/gas/mips/allegrex.d
> > @@ -46,5 +46,6 @@ Disassembly of section .text:
> >  0x00000094 7002003d    mfdr    \$2,\$0
> >  0x00000098 7002083d    mfdr    \$2,\$1
> >  0x0000009c 7083083d    mtdr    \$3,\$1
> > -0x000000a0 7000003e    dret
> > +0x000000a0 7000003f    dbreak
> > +0x000000a4 7000003e    dret
> >         \.\.\.
> > --
> > 2.40.1
> >
>
>
> --
> YunQiang Su



-- 
YunQiang Su