[PATCH v2] LoongArch: get the opcode of instruction approriately

[Xin Wang]

The opcode of instruction should be got by masking the right bits.

Signed-off-by: Xin Wang <wangxin03@loongson.cn>
---
 bfd/elfnn-loongarch.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c
index db6d419a052..5fa19a24e79 100644
--- a/bfd/elfnn-loongarch.c
+++ b/bfd/elfnn-loongarch.c
@@ -4965,7 +4965,7 @@ loongarch_relax_pcala_addi (bfd *abfd, asection *sec, asection *sym_sec,
       || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX)
       || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX)
       || (rel_hi->r_offset + 4 != rel_lo->r_offset)
-      || ((add & addi_d) != addi_d)
+      || ((add & 0xffc00000) != addi_d)
       /* Is pcalau12i $rd + addi.d $rd,$rd?  */
       || ((add & 0x1f) != rd)
       || (((add >> 5) & 0x1f) != rd)
@@ -5026,7 +5026,7 @@ loongarch_relax_call36 (bfd *abfd, asection *sec, asection *sym_sec,
 
   /* Is pcalau12i + addi.d insns?  */
   if ((ELFNN_R_TYPE ((rel + 1)->r_info) != R_LARCH_RELAX)
-      || ((jirl & jirl_opcode) != jirl_opcode)
+      || ((jirl & 0xfc000000) != jirl_opcode)
       || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xf8000000)
       || ((bfd_signed_vma)(symval - pc) > (bfd_signed_vma)(int32_t)0x7fffffc))
     return false;
@@ -5191,7 +5191,7 @@ loongarch_relax_tls_ld_gd_desc (bfd *abfd, asection *sec, asection *sym_sec,
       || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX)
       || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX)
       || (rel_hi->r_offset + 4 != rel_lo->r_offset)
-      || ((add & addi_d) != addi_d)
+      || ((add & 0xffc00000) != addi_d)
       /* Is pcalau12i $rd + addi.d $rd,$rd?  */
       || ((add & 0x1f) != rd)
       || (((add >> 5) & 0x1f) != rd)
-- 
2.25.1