[committed] MIPS/opcodes: Correct documentation for R6 operand types

[Maciej W. Rozycki]

The "-t", "-u", "-v", and "-w" operand types refer 'rt' operand, which 
is the target register rather than the source register.  Additionally 
the "-x" and "-y" R6 operand types refer 'rs' rather than 'rt' operand 
of the BOVC/BNVC and the BEQC/BNEC instructions respectively.  Also the 
"-x" operand type does not permit 'rs' to be the same as 'rt'.

Correct inline documentation in opcode/mips.h accordingly.
---
 include/opcode/mips.h |   13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

binutils-mips-opcodes-r6-op-doc-fix.diff
Index: binutils-gdb/include/opcode/mips.h
===================================================================
--- binutils-gdb.orig/include/opcode/mips.h
+++ binutils-gdb/include/opcode/mips.h
@@ -984,13 +984,12 @@ mips_opcode_32bit_p (const struct mips_o
    "-b" (-131072 .. 131071) << 3 at bit 0
    "-d" Same as destination register GP
    "-s" 5 bit source register specifier (OP_*_RS) not $0
-   "-t" 5 bit source register specifier (OP_*_RT) not $0
-   "-u" 5 bit source register specifier (OP_*_RT) greater than OP_*_RS
-   "-v" 5 bit source register specifier (OP_*_RT) not $0 not OP_*_RS
-   "-w" 5 bit source register specifier (OP_*_RT) less than or equal to OP_*_RS
-   "-x" 5 bit source register specifier (OP_*_RT) greater than or
-        equal to OP_*_RS
-   "-y" 5 bit source register specifier (OP_*_RT) not $0 less than OP_*_RS
+   "-t" 5 bit target register specifier (OP_*_RT) not $0
+   "-u" 5 bit target register specifier (OP_*_RT) greater than OP_*_RS
+   "-v" 5 bit target register specifier (OP_*_RT) not $0 not OP_*_RS
+   "-w" 5 bit target register specifier (OP_*_RT) less than or equal to OP_*_RS
+   "-x" 5 bit source register specifier (OP_*_RS) greater than OP_*_RT
+   "-y" 5 bit source register specifier (OP_*_RS) not $0 less than OP_*_RT
    "-A" symbolic offset (-262144 .. 262143) << 2 at bit 0
    "-B" symbolic offset (-131072 .. 131071) << 3 at bit 0