[PATCH,V6 3/9] opcodes: aarch64: add flags to denote subclasses of ldst insns

[Richard Sandiford]

Indu Bhagat <indu.bhagat@oracle.com> writes:
> On 7/18/24 3:20 AM, Richard Sandiford wrote:
>> Indu Bhagat <indu.bhagat@oracle.com> writes:
>>> [...]
>>> +  CORE_INSN ("strb", 0x38000400, 0xffe00400, ldst_imm9, 0, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_LDST_STORE),
>>> +  CORE_INSN ("ldrb", 0x38400400, 0xffe00400, ldst_imm9, 0, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_LDST_LOAD),
>> 
>> I meant that these two (LDRB and STRB) should be F_SUBCLASS_OTHER too.
>> Same for the pairs below:
>> 
>
> Ah I see.  Sorry for the back and forths on this.
>
>>> +  CORE_INSN ("strh", 0x78000400, 0xffe00400, ldst_imm9, 0, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_LDST_STORE),
>>> +  CORE_INSN ("ldrh", 0x78400400, 0xffe00400, ldst_imm9, 0, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_LDST_LOAD),
>> 
>>> +  CORE_INSN ("strb", 0x39000000, 0xffc00000, ldst_pos, OP_STRB_POS, OP2 (Rt, ADDR_UIMM12), QL_LDST_W8, F_LDST_STORE),
>>> +  CORE_INSN ("ldrb", 0x39400000, 0xffc00000, ldst_pos, OP_LDRB_POS, OP2 (Rt, ADDR_UIMM12), QL_LDST_W8, F_LDST_LOAD),
>> 
>>> +  CORE_INSN ("strh", 0x79000000, 0xffc00000, ldst_pos, OP_STRH_POS, OP2 (Rt, ADDR_UIMM12), QL_LDST_W16, F_LDST_STORE),
>>> +  CORE_INSN ("ldrh", 0x79400000, 0xffc00000, ldst_pos, OP_LDRH_POS, OP2 (Rt, ADDR_UIMM12), QL_LDST_W16, F_LDST_LOAD),
>> 
>> OK with that change, thanks.
>> 
>
> I have made this change.  But I think the check in tc-aarch64-ginsn.c 
> for the load store functions:
>
> aarch64_get_qualifier_esize (opnd1->qualifier) < 8
>
> is till good to keep to ensure ginsn creation code is robust.

Yeah, I agree we should keep that too.

Richard