[PATCH] x86/APX: remove two inconsistencies
Kong, Lingling
lingling.kong@intel.com
Fri Jul 12 09:02:32 GMT 2024
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Thursday, July 11, 2024 10:45 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Kong, Lingling <lingling.kong@intel.com>
> Subject: [PATCH] x86/APX: remove two inconsistencies
>
> As indicated in earlier discussion, permitting GOTTPOFF uniformly for all legacy
> non-SIMD insns while at the same time restricting to just certain ADD forms when
> EVEX-encoded is inconsistent. Make promoted insns "equal" to their legacy
> original ones. Doing that adjustment prevents another inconsistency, too: In
>
> data16 neg (%rax)
> data16 neg (%r16)
> data16 {nf} neg (%rax)
>
> it is not logical why the last one shouldn't be permitted. Bypassing that check
> requires other adjustments, though, to actually properly consume (and then
> squash) the data size prefix.
>
> While there also add the missing CMP and TEST cases to the test case being
> modified.
>
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -4400,9 +4400,24 @@ build_rex2_prefix (void)
> | W | v`v`v`v | `x' | pp |
> | z| L'L | b | `v | aaa |
> */
> -static void
> +static bool
> build_apx_evex_prefix (void)
> {
> + /* To mimic behavior for legacy insns, transform use of DATA16 into its
> + embedded-prefix representation. */
> + if (i.prefix[DATA_PREFIX] && i.tm.opcode_space == SPACE_EVEXMAP4)
> + {
> + if (i.tm.opcode_modifier.opcodeprefix)
> + {
> + as_bad (i.tm.opcode_modifier.opcodeprefix == PREFIX_0X66
> + ? _("same type of prefix used twice")
> + : _("conflicting use of `data16' prefix"));
> + return false;
> + }
> + i.tm.opcode_modifier.opcodeprefix = PREFIX_0X66;
> + i.prefix[DATA_PREFIX] = 0;
> + }
> +
> build_evex_prefix ();
> if (i.rex2 & REX_R)
> i.vex.bytes[1] &= ~0x10;
> @@ -4438,6 +4453,8 @@ build_apx_evex_prefix (void)
> /* Encode the NF bit. */
> if (i.has_nf || i.tm.opcode_modifier.operandconstraint == EVEX_NF)
> i.vex.bytes[3] |= 0x04;
> +
> + return true;
> }
>
> static void establish_rex (void)
> @@ -7523,7 +7540,7 @@ md_assemble (char *line)
> i.prefix[LOCK_PREFIX] = 0;
> }
>
> - if (is_any_vex_encoding (&i.tm)
> + if ((is_any_vex_encoding (&i.tm) && i.tm.opcode_space !=
> + SPACE_EVEXMAP4)
> || i.tm.operand_types[i.imm_operands].bitfield.class >= RegMMX
> || i.tm.operand_types[i.imm_operands + 1].bitfield.class >= RegMMX)
> {
> @@ -7539,21 +7556,6 @@ md_assemble (char *line)
> switch (i.reloc[j])
> {
> case BFD_RELOC_X86_64_GOTTPOFF:
> - if (i.tm.mnem_off == MN_add
> - && i.tm.opcode_space == SPACE_EVEXMAP4
> - && i.mem_operands == 1
> - && i.base_reg
> - && i.base_reg->reg_num == RegIP
> - && i.reg_operands == (i.operands - 1)
> - && i.types[i.operands - 1].bitfield.class == Reg)
> - /* Allow APX:
> - add %reg1, foo@gottpoff(%rip), %reg2
> - add foo@gottpoff(%rip), %reg, %reg2
> - {nf} add foo@gottpoff(%rip), %reg
> - {nf} add %reg1, foo@gottpoff(%rip), %reg2
> - {nf} add foo@gottpoff(%rip), %reg, %reg2. */
> - break;
> - /* Fall through. */
This part is OK for me, originally we just allow insns in EVEX could do TLS IE which could also pass linker check.
But in legacy without EVEX, we support TLS relocation for all instructions with memory op at assemble stage.
As I know, no such limitation in LLVM for EVEX.
Thanks,
Lingling
> case BFD_RELOC_386_TLS_GOTIE:
> case BFD_RELOC_386_TLS_LE_32:
> case BFD_RELOC_X86_64_TLSLD:
> @@ -7722,7 +7724,10 @@ md_assemble (char *line)
> }
>
> if (is_apx_evex_encoding ())
> - build_apx_evex_prefix ();
> + {
> + if (!build_apx_evex_prefix ())
> + return;
> + }
> else if (i.tm.opcode_modifier.vex)
> build_vex_prefix (t);
> else
> --- a/gas/testsuite/gas/i386/noreg64-evex.d
> +++ b/gas/testsuite/gas/i386/noreg64-evex.d
> @@ -20,6 +20,10 @@ Disassembly of section \.text:
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 20 89 00 00 00[ ]+\{evex\} andl
> \$0x89,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 20 34 12 00 00[ ]+\{evex\} andl
> \$0x1234,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 20 78 56 34 12[ ]+\{evex\} andl
> \$0x12345678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a 83 38 01[ ]+ccmptl \{dfv=\}
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a 81 38 89 00 00 00[ ]+ccmptl \{dfv=\}
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a 81 38 34 12 00 00[ ]+ccmptl \{dfv=\}
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a 81 38 78 56 34 12[ ]+ccmptl \{dfv=\}
> \$0x12345678,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 f1 00[ ]+\{evex\} crc32l
> \(%rax\),%eax
> [ ]*[a-f0-9]+:[ ]*62 f4 fc 08 f1 00[ ]+\{evex\} crc32q
> \(%rax\),%rax
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 ff 08[ ]+\{evex\} decl \(%rax\)
> @@ -66,6 +70,9 @@ Disassembly of section \.text:
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 28 89 00 00 00[ ]+\{evex\} subl
> \$0x89,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 28 34 12 00 00[ ]+\{evex\} subl
> \$0x1234,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 28 78 56 34 12[ ]+\{evex\} subl
> \$0x12345678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a f7 00 89 00 00 00[ ]+ctesttl \{dfv=\}
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a f7 00 34 12 00 00[ ]+ctesttl \{dfv=\}
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 04 0a f7 00 78 56 34 12[ ]+ctesttl \{dfv=\}
> \$0x12345678,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 83 30 01[ ]+\{evex\} xorl \$0x1,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 30 89 00 00 00[ ]+\{evex\} xorl
> \$0x89,\(%rax\)
> [ ]*[a-f0-9]+:[ ]*62 f4 7c 08 81 30 34 12 00 00[ ]+\{evex\} xorl
> \$0x1234,\(%rax\)
> --- a/gas/testsuite/gas/i386/noreg64-evex.e
> +++ b/gas/testsuite/gas/i386/noreg64-evex.e
> @@ -1,64 +1,140 @@
> .*: Assembler messages:
> .*:[0-9]+: Warning:.*`adc'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`adc'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`adc'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`adc'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`add'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`add'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`add'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`add'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`and'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`and'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`and'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`and'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`cmp'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`cmp'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`cmp'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`cmp'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`crc32'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`crc32'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`dec'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`div'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`idiv'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`imul'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`inc'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`mul'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`neg'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`not'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`or'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`or'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`or'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`or'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rcr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rol'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rol'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`rol'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`ror'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`ror'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`ror'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sal'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sal'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sal'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sar'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sar'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sar'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sbb'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sbb'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sbb'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sbb'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shl'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`shr'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sub'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sub'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sub'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`sub'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`test'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`test'
> +.*:[1-9][0-9]*: Info: .*
> +.*:[0-9]+: Warning:.*`test'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`xor'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`xor'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`xor'
> +.*:[1-9][0-9]*: Info: .*
> .*:[0-9]+: Warning:.*`xor'
> +.*:[1-9][0-9]*: Info: .*
> #pass
> --- a/gas/testsuite/gas/i386/noreg64-evex.s
> +++ b/gas/testsuite/gas/i386/noreg64-evex.s
> @@ -1,66 +1,79 @@
> -# Check 64-bit insns not sizeable through register operands with evex
> + .macro pfx insn:vararg
> + .ifdef DATA16
> + data16 {evex} \insn
> + .else
> + {evex} \insn
> + .endif
> + .endm
>
> .text
> _start:
> - {evex} adc $1, (%rax)
> - {evex} adc $0x89, (%rax)
> - {evex} adc $0x1234, (%rax)
> - {evex} adc $0x12345678, (%rax)
> - {evex} add $1, (%rax)
> - {evex} add $0x89, (%rax)
> - {evex} add $0x1234, (%rax)
> - {evex} add $0x12345678, (%rax)
> - {evex} and $1, (%rax)
> - {evex} and $0x89, (%rax)
> - {evex} and $0x1234, (%rax)
> - {evex} and $0x12345678, (%rax)
> - {evex} crc32 (%rax), %eax
> - {evex} crc32 (%rax), %rax
> - {evex} dec (%rax)
> - {evex} div (%rax)
> - {evex} idiv (%rax)
> - {evex} imul (%rax)
> - {evex} inc (%rax)
> - {evex} mul (%rax)
> - {evex} neg (%rax)
> - {evex} not (%rax)
> - {evex} or $1, (%rax)
> - {evex} or $0x89, (%rax)
> - {evex} or $0x1234, (%rax)
> - {evex} or $0x12345678, (%rax)
> - {evex} rcl $1, (%rax)
> - {evex} rcl $2, (%rax)
> - {evex} rcl %cl, (%rax)
> - {evex} rcr $1, (%rax)
> - {evex} rcr $2, (%rax)
> - {evex} rcr %cl, (%rax)
> - {evex} rol $1, (%rax)
> - {evex} rol $2, (%rax)
> - {evex} rol %cl, (%rax)
> - {evex} ror $1, (%rax)
> - {evex} ror $2, (%rax)
> - {evex} ror %cl, (%rax)
> - {evex} sal $1, (%rax)
> - {evex} sal $2, (%rax)
> - {evex} sal %cl, (%rax)
> - {evex} sar $1, (%rax)
> - {evex} sar $2, (%rax)
> - {evex} sar %cl, (%rax)
> - {evex} sbb $1, (%rax)
> - {evex} sbb $0x89, (%rax)
> - {evex} sbb $0x1234, (%rax)
> - {evex} sbb $0x12345678, (%rax)
> - {evex} shl $1, (%rax)
> - {evex} shl $2, (%rax)
> - {evex} shl %cl, (%rax)
> - {evex} shr $1, (%rax)
> - {evex} shr $2, (%rax)
> - {evex} shr %cl, (%rax)
> - {evex} sub $1, (%rax)
> - {evex} sub $0x89, (%rax)
> - {evex} sub $0x1234, (%rax)
> - {evex} sub $0x12345678, (%rax)
> - {evex} xor $1, (%rax)
> - {evex} xor $0x89, (%rax)
> - {evex} xor $0x1234, (%rax)
> - {evex} xor $0x12345678, (%rax)
> + pfx adc $1, (%rax)
> + pfx adc $0x89, (%rax)
> + pfx adc $0x1234, (%rax)
> + pfx adc $0x12345678, (%rax)
> + pfx add $1, (%rax)
> + pfx add $0x89, (%rax)
> + pfx add $0x1234, (%rax)
> + pfx add $0x12345678, (%rax)
> + pfx and $1, (%rax)
> + pfx and $0x89, (%rax)
> + pfx and $0x1234, (%rax)
> + pfx and $0x12345678, (%rax)
> + pfx cmp $1, (%rax)
> + pfx cmp $0x89, (%rax)
> + pfx cmp $0x1234, (%rax)
> + pfx cmp $0x12345678, (%rax)
> + pfx crc32 (%rax), %eax
> + pfx crc32 (%rax), %rax
> + pfx dec (%rax)
> + pfx div (%rax)
> + pfx idiv (%rax)
> + pfx imul (%rax)
> + pfx inc (%rax)
> + pfx mul (%rax)
> + pfx neg (%rax)
> + pfx not (%rax)
> + pfx or $1, (%rax)
> + pfx or $0x89, (%rax)
> + pfx or $0x1234, (%rax)
> + pfx or $0x12345678, (%rax)
> + pfx rcl $1, (%rax)
> + pfx rcl $2, (%rax)
> + pfx rcl %cl, (%rax)
> + pfx rcr $1, (%rax)
> + pfx rcr $2, (%rax)
> + pfx rcr %cl, (%rax)
> + pfx rol $1, (%rax)
> + pfx rol $2, (%rax)
> + pfx rol %cl, (%rax)
> + pfx ror $1, (%rax)
> + pfx ror $2, (%rax)
> + pfx ror %cl, (%rax)
> + pfx sal $1, (%rax)
> + pfx sal $2, (%rax)
> + pfx sal %cl, (%rax)
> + pfx sar $1, (%rax)
> + pfx sar $2, (%rax)
> + pfx sar %cl, (%rax)
> + pfx sbb $1, (%rax)
> + pfx sbb $0x89, (%rax)
> + pfx sbb $0x1234, (%rax)
> + pfx sbb $0x12345678, (%rax)
> + pfx shl $1, (%rax)
> + pfx shl $2, (%rax)
> + pfx shl %cl, (%rax)
> + pfx shr $1, (%rax)
> + pfx shr $2, (%rax)
> + pfx shr %cl, (%rax)
> + pfx sub $1, (%rax)
> + pfx sub $0x89, (%rax)
> + pfx sub $0x1234, (%rax)
> + pfx sub $0x12345678, (%rax)
> + pfx test $0x89, (%rax)
> + pfx test $0x1234, (%rax)
> + pfx test $0x12345678, (%rax)
> + pfx xor $1, (%rax)
> + pfx xor $0x89, (%rax)
> + pfx xor $0x1234, (%rax)
> + pfx xor $0x12345678, (%rax)
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/noreg64-evex-data16.d
> @@ -0,0 +1,81 @@
> +#as: --defsym DATA16=1
> +#objdump: -dw
> +#name: 64-bit insns not sizeable through register operands w/ {evex}
> +and data16
> +#source: noreg64-evex.s
> +#warning_output: noreg64-evex-data16.e
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 10 01[ ]+\{evex\} adcw
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 10 89 00[ ]+\{evex\} adcw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 10 34 12[ ]+\{evex\} adcw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 10 78 56[ ]+\{evex\} adcw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 00 01[ ]+\{evex\} addw
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 00 89 00[ ]+\{evex\} addw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 00 34 12[ ]+\{evex\} addw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 00 78 56[ ]+\{evex\} addw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 20 01[ ]+\{evex\} andw
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 20 89 00[ ]+\{evex\} andw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 20 34 12[ ]+\{evex\} andw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 20 78 56[ ]+\{evex\} andw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a 83 38 01[ ]+ccmptw \{dfv=\}
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a 81 38 89 00[ ]+ccmptw \{dfv=\}
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a 81 38 34 12[ ]+ccmptw \{dfv=\}
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a 81 38 78 56[ ]+ccmptw \{dfv=\}
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f1 00[ ]+\{evex\} crc32w
> \(%rax\),%eax
> +[ ]*[a-f0-9]+:[ ]*62 f4 fd 08 f1 00[ ]+\{evex\} crc32q
> \(%rax\),%rax
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 ff 08[ ]+\{evex\} decw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 30[ ]+\{evex\} divw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 38[ ]+\{evex\} idivw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 28[ ]+\{evex\} imulw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 ff 00[ ]+\{evex\} incw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 20[ ]+\{evex\} mulw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 18[ ]+\{evex\} negw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 f7 10[ ]+\{evex\} notw \(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 08 01[ ]+\{evex\} orw \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 08 89 00[ ]+\{evex\} orw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 08 34 12[ ]+\{evex\} orw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 08 78 56[ ]+\{evex\} orw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 10[ ]+\{evex\} rclw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 10 02[ ]+\{evex\} rclw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 10[ ]+\{evex\} rclw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 18[ ]+\{evex\} rcrw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 18 02[ ]+\{evex\} rcrw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 18[ ]+\{evex\} rcrw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 00[ ]+\{evex\} rolw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 00 02[ ]+\{evex\} rolw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 00[ ]+\{evex\} rolw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 08[ ]+\{evex\} rorw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 08 02[ ]+\{evex\} rorw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 08[ ]+\{evex\} rorw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 20[ ]+\{evex\} shlw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 20 02[ ]+\{evex\} shlw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 20[ ]+\{evex\} shlw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 38[ ]+\{evex\} sarw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 38 02[ ]+\{evex\} sarw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 38[ ]+\{evex\} sarw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 18 01[ ]+\{evex\} sbbw
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 18 89 00[ ]+\{evex\} sbbw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 18 34 12[ ]+\{evex\} sbbw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 18 78 56[ ]+\{evex\} sbbw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 20[ ]+\{evex\} shlw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 20 02[ ]+\{evex\} shlw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 20[ ]+\{evex\} shlw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d1 28[ ]+\{evex\} shrw \$1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 c1 28 02[ ]+\{evex\} shrw \$0x2,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 d3 28[ ]+\{evex\} shrw %cl,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 28 01[ ]+\{evex\} subw
> \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 28 89 00[ ]+\{evex\} subw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 28 34 12[ ]+\{evex\} subw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 28 78 56[ ]+\{evex\} subw
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a f7 00 89 00[ ]+ctesttw \{dfv=\}
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a f7 00 34 12[ ]+ctesttw \{dfv=\}
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 05 0a f7 00 78 56[ ]+ctesttw \{dfv=\}
> \$0x5678,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 83 30 01[ ]+\{evex\} xorw \$0x1,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 30 89 00[ ]+\{evex\} xorw
> \$0x89,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 30 34 12[ ]+\{evex\} xorw
> \$0x1234,\(%rax\)
> +[ ]*[a-f0-9]+:[ ]*62 f4 7d 08 81 30 78 56[ ]+\{evex\} xorw
> \$0x5678,\(%rax\)
> +#pass
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/noreg64-evex-data16.e
> @@ -0,0 +1,19 @@
> +.*: Assembler messages:
> +.*:3: Warning: .*shortened.*
> +.*:14: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:18: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:22: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:26: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:40: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:62: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:72: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:75: Info: .*
> +.*:3: Warning: .*shortened.*
> +.*:79: Info: .*
> --- a/gas/testsuite/gas/i386/x86-64.exp
> +++ b/gas/testsuite/gas/i386/x86-64.exp
> @@ -134,6 +134,7 @@ run_dump_test "noreg64-rex64"
> run_dump_test "noreg-intel64"
> run_list_test "noreg-intel64" "-I${srcdir}/$subdir -mintel64"
> run_dump_test "noreg64-evex"
> +run_dump_test "noreg64-evex-data16"
> run_list_test "movx64" "-al"
> run_list_test "cvtsi2sX"
> run_list_test "x86-64-nosse2" "-al"
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