[PATCH 1/2] LoongArch: Delete extra instructions when TLS type transition

Lulu Cai cailulu@loongson.cn
Sat Jan 27 02:06:57 GMT 2024


On 1/27/24 2:22 AM, Xi Ruoyao wrote:
> On Fri, 2024-01-26 at 21:55 +0800, Lulu Cai wrote:
>> This modification mainly changes the timing of type transition,
>> adds relaxation to the old LE instruction sequence, and fixes
>> bugs in extreme code models.
> I'd suggest to separate the bug fixes (requiring R_LARCH_RELAX for DESC
> and IE transition) out into one separate commit and apply it for 2.42.
> And the old LE relaxation & instruction deletion should be only applied
> for trunk (2.43).  We are just toooooo close to the 2.42 release, and
> deleting instructions is always "dangerous" even if we do it very
> carefully.
>
> /* snip */


Thanks for reminding. I will send a new patch with a separate bug fix later.


>> +loongarch_can_trans_tls (bfd *input_bfd,
>> +			 struct bfd_link_info *info,
>> +			 struct elf_link_hash_entry *h,
>> +			 const Elf_Internal_Rela *rel,
>> +			 unsigned int r_type)
>>   {
>>     char symbol_tls_type;
>>     unsigned int reloc_got_type;
>> +  unsigned int r_symndx = ELFNN_R_SYM (rel->r_info);
>>   
>> -  if (! (IS_LOONGARCH_TLS_DESC_RELOC (r_type)
>> -	 || IS_LOONGARCH_TLS_IE_RELOC (r_type)))
>> +  /* Only TLS DESC/IE in normal code mode will perform type
>> +     transition.  */
>> +  if (! (IS_LOONGARCH_TLS_TRANS_RELOC (r_type)
>> +	  && ELFNN_R_TYPE ((rel + 1)->r_info) == R_LARCH_RELAX))
> We need to check if rel is the last relocation of the section, or rel +
> 1 may be an OOB read.
>

Agreed, I will pay attention to these later.


>>   static bool
>>   loongarch_relax_tls_le (bfd *abfd, asection *sec,
>> @@ -4165,31 +4198,56 @@ loongarch_relax_tls_le (bfd *abfd, asection *sec,
>>     uint32_t insn = bfd_get (32, abfd, contents + rel->r_offset);
>>     static uint32_t insn_rj,insn_rd;
>>     symval = symval - elf_hash_table (link_info)->tls_sec->vma;
>> -  /* Whether the symbol offset is in the interval (offset < 0x800).  */
>> -  if (ELFNN_R_TYPE ((rel + 1)->r_info == R_LARCH_RELAX) && (symval < 0x800))
>> +  /* The old LE instruction sequence can be relaxed when the symbol offset
>> +     is smaller than the 12-bit range.  */
>> +  if (ELFNN_R_TYPE ((rel + 1)->r_info) == R_LARCH_RELAX && (symval <= 0xfff))
> Likewise.
>



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