[PATCH] x86: support APX forms of U{RD,WR}MSR

[Jan Beulich]

On 15.01.2024 07:41, Cui, Lili wrote:
>> @@ -9090,6 +9094,9 @@ get_valid_dis386 (const struct dis386 *d
>>  	case 0x6:
>>  	  vex_table_index = EVEX_MAP6;
>>  	  break;
>> +	case 0x7:
>> +	  vex_table_index = EVEX_MAP7;
>> +	  break;
>>  	}
>>
>>        /* The second byte after 0x62.  */ @@ -9159,7 +9166,12 @@
>> get_valid_dis386 (const struct dis386 *d
>>
>>        ins->codep++;
>>        vindex = *ins->codep++;
>> -      dp = &evex_table[vex_table_index][vindex];
>> +      if (vex_table_index != EVEX_MAP7)
>> +	dp = &evex_table[vex_table_index][vindex];
>> +      else if (vindex == 0xf8)
>> +	dp = &map7_f8_opcode;
>> +      else
>> +	dp = &bad_opcode;
> 
> 
> The processing of this part of MAP7 seems strange. Maybe we can restore it when more map7 instructions appear in the future.

You realize this is simply a copy of what we do for VEX map 7? And yes,
should map 7 end up less sparse in the future, we'll certainly want to
introduce a "proper" table.

Jan