[PATCH] opcodes: i386: fix dw2_regnum data type in reg_entry

H.J. Lu hjl.tools@gmail.com
Thu Jan 11 13:27:14 GMT 2024


On Thu, Jan 11, 2024 at 12:05 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 11.01.2024 08:59, Kong, Lingling wrote:
> >
> >
> >> -----Original Message-----
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Thursday, January 11, 2024 3:43 PM
> >> To: Kong, Lingling <lingling.kong@intel.com>
> >> Cc: binutils@sourceware.org; Indu Bhagat <indu.bhagat@oracle.com>; Cui, Lili
> >> <lili.cui@intel.com>; H.J. Lu <hjl.tools@gmail.com>; Hu, Lin1
> >> <lin1.hu@intel.com>
> >> Subject: Re: [PATCH] opcodes: i386: fix dw2_regnum data type in reg_entry
> >>
> >> On 11.01.2024 02:35, Kong, Lingling wrote:
> >>>
> >>>
> >>>> -----Original Message-----
> >>>> From: Jan Beulich <jbeulich@suse.com>
> >>>> Sent: Tuesday, January 9, 2024 4:25 PM
> >>>> To: Indu Bhagat <indu.bhagat@oracle.com>; Cui, Lili
> >>>> <lili.cui@intel.com>; H.J. Lu <hjl.tools@gmail.com>; Kong, Lingling
> >>>> <lingling.kong@intel.com>; Hu, Lin1 <lin1.hu@intel.com>
> >>>> Cc: binutils@sourceware.org
> >>>> Subject: Re: [PATCH] opcodes: i386: fix dw2_regnum data type in
> >>>> reg_entry
> >>>>
> >>>> On 09.01.2024 02:12, Indu Bhagat wrote:
> >>>>> The DWARF register numbers for the APX EGRPs start with 130.  The
> >>>>> data type holding the same currently is signed char.
> >>>>>
> >>>>> ChangeLog:
> >>>>>   * opcodes/i386-opc.h (reg_entry): Bump to signed short.
> >>>>
> >>>> So yes, something needs doing. But there are further questions to be
> >>>> raised to the original authors: Was the code tested at all in this
> >>>> regard? Why do numbers start at 130, when according to i386-reg.tbl
> >>>> 128 and 129 are unused (and would hence be more natural to [also] use)?
> >>>
> >>> This is because for some historical reasons, some numbers(126-129) have been
> >> agreed to be reserved.
> >>> Details can be found in https://groups.google.com/g/x86-64-
> >> abi/c/GS8LZf5nQFk.
> >>
> >> I'm sorry, there are no details there. There's merely mention of these four being
> >> reserved, without supplying any reason (historical or not).
> >
> > Sorry, you could see https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/6207f9a2c0645f20a7ec591a09e4c382b1675784
> > There are reserved  for Intel MPX (Memory Protection Extensions) provides 4 128-bit wide bound registers (reg{bnd0} - reg{bnd3}).
>
> Then why aren't these marked that way? The commit introducing them to
> opcodes used Dw2Inval, and it was never changed from that (i.e. there
> wasn't even deliberate undoing with respective justification).
>

Leave them as reserved.  We have plenty.

-- 
H.J.


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