[PATCH] x86: adjust which Dwarf2 register numbers to use

Indu Bhagat indu.bhagat@oracle.com
Thu Feb 15 22:22:05 GMT 2024


On 2/9/24 00:11, Jan Beulich wrote:
> Consumers can't know which execution mode is in effect for a certain
> piece of code; they can only go from object file properties. Hence which
> register numbers to encode ought to depend solely on object file type.
> 
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -5409,7 +5409,7 @@ ginsn_dw2_regnum (const reg_entry *ireg)
>     if (ireg->reg_num == RegIP || ireg->reg_num == RegIZ)
>       return GINSN_DW2_REGNUM_RSI_DUMMY;
>   
> -  dwarf_reg = ireg->dw2_regnum[flag_code >> 1];
> +  dwarf_reg = ireg->dw2_regnum[object_64bit];
>   
>     if (dwarf_reg == Dw2Inval)
>       {
> @@ -17461,7 +17461,7 @@ tc_x86_parse_to_dw2regnum (expressionS *
>         if ((addressT) exp->X_add_number < i386_regtab_size)
>   	{
>   	  exp->X_add_number = i386_regtab[exp->X_add_number]
> -			      .dw2_regnum[flag_code >> 1];
> +			      .dw2_regnum[object_64bit];
>   	  if (exp->X_add_number != Dw2Inval)
>   	    exp->X_op = O_constant;
>   	}

On one hand, I see that the suggested code changes are making things 
semantically clearer, I would like to understand:

1. If there is a scenario where flag_code is CODE16_BIT / CODE32_BIT and 
object_64bit equal to 1 is supported.  gcc passes --32 when using -m16 
or -m32.

2. Irrespective of #1, shouldn't we then also use "if (object_64bit == 
1)" instead of "if (flag_code == CODE_64BIT)" in md_begin where we set 
the value of x86_dwarf2_return_column etc ?

Thanks


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