[PATCH v1] x86: Support ZHAOXIN padlock instructions

[Mayshao-oc]

> > From: Mayshao-oc <Mayshao-oc@zhaoxin.com>
> > Sent: Friday, December 13, 2024 11:25 AM
> >
> > Hi all:
> >
> >       This patch adds support for Zhaoxin padlock instructions, and display all the
> > padlock instructions using rep prefix instead of repz, because all padlock
> > instructions don't effect zf flag.
> >
> 
> A quick reminder. From documentation, it seems that Zhaoxin is going to extend
> the usage for old bits for new instructions. If you are only using inline asm in the
> future (and I suppose so since I did not get PadLock in GCC code base from my quick
> search), it should be ok. But there will be a potential issue for illegal instruction on
> HW if the assumption is wrong since I don't see a way to reject those insts.
Hi Haochen:
        Thanks for your comments,but I am a little confused.Why it is ok to be used as inline assembly,
and there will be an issue if gcc generates it? Could you please give an example to illustrate
your idea?
> 
> For the patch, could you split it into two patch, one to replace repz and one to add
> new insts? It will help to get a clearer picture on refactoring.
Ok, I'll do it.
> 
> Thx,
> Haochen

BR
Mayshao