[PATCH] Support Intel SM4 EVEX extension

[Jan Beulich]

On 05.12.2024 08:04, Haochen Jiang wrote:
> Nit: When I send the patch, I found that the AVX10.2/256 and
> AVX10.2/512 tests are combined with each other. I would split them.

Yes please.

> --- a/gas/NEWS
> +++ b/gas/NEWS
> @@ -1,5 +1,7 @@
>  -*- text -*-
>  
> +* Add support for the x86 Intel SM4 EVEX instructions.

For a NEWS entry I think EVEX is too technical. Imo it wants to mention
AVX10.2 instead.

> --- a/opcodes/i386-opc.h
> +++ b/opcodes/i386-opc.h
> @@ -229,8 +229,6 @@ enum i386_cpu
>    CpuUSER_MSR,
>    /* Intel MSR_IMM Instructions support required.  */
>    CpuMSR_IMM,
> -  /* Intel AVX10.2 Instructions support required.  */
> -  CpuAVX10_2,
>    /* mwaitx instruction required */
>    CpuMWAITX,
>    /* Clzero instruction required */
> @@ -337,6 +335,8 @@ enum i386_cpu
>    CpuAPX_F,
>    /* Intel AMX-TRANSPOSE Instructions support required.  */
>    CpuAMX_TRANSPOSE,
> +  /* Intel AVX10.2 Instructions support required.  */
> +  CpuAVX10_2,
>    /* Not supported in the 64bit mode  */
>    CpuNo64,

I was going to ask to put this ahead of AMX-TRANSPOSE, but there's no
AMX-TRANSPOSE in the upstream file at all so far. Did you forget to
re-base onto the plain upstream tree?

> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -2196,6 +2196,9 @@ vsm3msg2, 0x66da, SM3, Modrm|Space0F38|Vex128|Src1VVVV|VexW0|NoSuf, { RegXMM|Uns
>  vsm4key4, 0xf3da, SM4, Modrm|Space0F38|Vex|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
>  vsm4rnds4, 0xf2da, SM4, Modrm|Space0F38|Vex|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
>  
> +vsm4key4, 0xf3da, SM4&AVX10_2, Modrm|Space0F38|Src1VVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
> +vsm4rnds4, 0xf2da, SM4&AVX10_2, Modrm|Space0F38|Src1VVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
> +
>  // SM4 instructions end.

Hmm, why is it that these can't be merged together, just like we merge
other AVX(-like) templates with their AVX512 ones? One question of course
is going to be whether this will be outliers, in which case the logic
needed in tc-i386.c may not be worth to add.

If they can't be merged, I think they would want at least templatizing,
though.

Jan