[PATCH 3/3] s390: Align instruction formats
Jens Remus
jremus@linux.ibm.com
Mon Aug 26 15:47:10 GMT 2024
Rename instruction format RRF_R0RER to RRF_R0RER2, as it operand wise
more closely relates to RRF_R0RR2 instead of RRF_R0RR.
This is a purely mechanical change.
opcodes/
* s390-opc.c (INSTR_RRF_R0RER, MASK_RRF_R0RER): Rename to
{INSTR|MASK}_RRF_R0RER2.
* s390-opc.txt (RRF_R0RER): Rename to RRF_R0RER2.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---
opcodes/s390-opc.c | 4 ++--
opcodes/s390-opc.txt | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index 10482fbc1e01..e4af0a49a430 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -381,7 +381,7 @@ unused_s390_operands_static_asserts (void)
#define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
#define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte */
#define INSTR_RRF_R0RR2 4, { R_24,R_28,R_16,0,0,0 } /* e.g. ark */
-#define INSTR_RRF_R0RER 4, { RE_24,R_28,R_16,0,0,0 } /* e.g. mgrk */
+#define INSTR_RRF_R0RER2 4, { RE_24,R_28,R_16,0,0,0 } /* e.g. mgrk */
#define INSTR_RRF_R0RR3 4, { R_24,R_28,R_16,0,0,0 } /* e.g. selrz */
#define INSTR_RRF_R0RR4 4, { R_24,R_CP16_28,0,0,0,0 } /* e.g. notr */
#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fidbr */
@@ -608,7 +608,7 @@ unused_s390_operands_static_asserts (void)
#define MASK_RRF_RURR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
-#define MASK_RRF_R0RER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRF_R0RER2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR3 { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR4 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index 4610a8fddd76..3f40c989d8f4 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1865,7 +1865,7 @@ e30000000038 agh RXY_RRRD "add halfword to 64 bit value" arch12 zarch
e30000000047 bic RXY_URRD "branch indirect on condition" arch12 zarch
e3f000000047 bi RXY_0RRD "unconditional indirect branch" arch12 zarch
e30000000047 bi*8 RXY_0RRD "branch indirect on condition" arch12 zarch
-b9ec mgrk RRF_R0RER "multiply 64x64reg -> 128" arch12 zarch
+b9ec mgrk RRF_R0RER2 "multiply 64x64reg -> 128" arch12 zarch
e30000000084 mg RXY_RERRD "multiply 64x64mem -> 128" arch12 zarch
e3000000003c mgh RXY_RRRD "multiply halfword 64x16mem -> 64" arch12 zarch
b9fd msrkc RRF_R0RR2 "multiply single 32x32 -> 32" arch12 zarch
--
2.43.0
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