[PATCH v4] RISC-V: Add support for RISC-V Profiles.

[Jan Beulich]

On 05.08.2024 14:47, Jiawei wrote:
> 在 2024/8/5 14:05, Jan Beulich 写道:
>> On 02.08.2024 15:33, Jiawei wrote:
>>> --- a/gas/NEWS
>>> +++ b/gas/NEWS
>>> @@ -59,6 +59,8 @@ Changes in 2.43:
>>>   
>>>   * Add support for RISC-V SiFive cease extension (XSfCease) with version 1.0.
>>>   
>>> +* Add support for RISC-V Profiles RV20/22.
>>> +
>>>   * The base register operand in D(X,B) and D(L,B) may be explicitly omitted
>>>     in assembly on s390. It can now be coded as D(X,) or D(L,) instead of D(X,0)
>>>     D(X,%r0), D(L,0), and D(L,%r0).
>> ... this continues to be misplaced,
> 
> I'm confused where should I add them, looking forward to your further 
> suggestions.

As said before - you want to add ahead of the 2.43 section, not in the
middle of that. Your change is for 2.44 after all.

Jan