[PATCH] RISC-V: map zext.h to pack/packw if Zbkb is enabled

[Nelson Chu]

On Fri, Aug 2, 2024 at 11:29 AM Hau Hsu <hau.hsu@sifive.com> wrote:

> `zext.h` is zero-extend halfword instruction that belongs to Zbb.
> Currently `zext.h` falls back to 2 shifts if Zbb is not enabled.
> However the encoding and operation is a special case of
> `pack/packw rd, rs1, rs2`, which belongs to Zbkb. The instructions pack
> the low halves of rs1 and rs2 into rd.  When rs2 is zero (x0), they
> behave like zero-extend instruction, and the encoding are exactly the
> same as zext.h.
>
> Thus we can map `zext.h` to `pack` or `packw` (rv64) if Zbkb is enabled,
> instead of 2 shifts. This reduces one instruction.
>
> This patch does this by making `zext.h` also available for Zbkb, and
> moving `pack`, `packw` fowrard in the opcode table for disassemble.
>
> opcode/
>     * riscv-opc.c (riscv_opcodes): Move forward entries for `pack` and
>       `packw` instructions. Update `zext.h` entries to use
>       `ZBB_OR_ZBKB` instruction class.
>
> gas/
>     * testsuite/gas/riscv/zext-to-pack.s: Add test for mapping zext to
>       pack/packw.
>     * testsuite/gas/riscv/zext-to-pack.d: Likewise.
>     * testsuite/gas/riscv/zext-to-packw.d: Likewise.
> ---
>  gas/testsuite/gas/riscv/zext-to-pack.d  | 11 +++++++++++
>  gas/testsuite/gas/riscv/zext-to-pack.s  |  2 ++
>  gas/testsuite/gas/riscv/zext-to-packw.d | 11 +++++++++++
>  opcodes/riscv-opc.c                     |  8 ++++----
>  4 files changed, 28 insertions(+), 4 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/zext-to-pack.d
>  create mode 100644 gas/testsuite/gas/riscv/zext-to-pack.s
>  create mode 100644 gas/testsuite/gas/riscv/zext-to-packw.d
>

I think you should update the spec and have a new version first since it
seems zext.h only belongs to zbb rather than zbkb according to v1.0.
https://github.com/riscv/riscv-bitmanip/blob/main/bitmanip/zbkb.adoc

Nelson
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