[PATCH] Add W table for USER_MSR under MAP4.
Hu, Lin1
lin1.hu@intel.com
Wed Apr 10 08:38:07 GMT 2024
Hi,
We found USER_MSR's disassembling process didn't through W table, so we
add it.
BRs,
Lin
opcodes/ChangeLog:
* i386-dis-evex-mod.h: Modify MOD_EVEX_MAP4_F8_P1,
MOD_EVEX_MAP4_F8_P3.
* i386-dis-evex-w.h (EVEX_W_MAP4_F8_P1_M_1): New.
(EVEX_W_MAP4_F8_P3_M_1): Ditto.
* i386-dis.c (vex_w_table): Add EVEX_W_MAP4_F8_P1_M_1,
EVEX_W_MAP4_F8_P3_M_1.
* i386-opc.tbl: Remove redundant '|'.
---
opcodes/i386-dis-evex-mod.h | 4 ++--
opcodes/i386-dis-evex-w.h | 8 ++++++++
opcodes/i386-dis.c | 2 ++
opcodes/i386-opc.tbl | 2 +-
4 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
index e793b24a6f8..879c91f3b76 100644
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -1,10 +1,10 @@
/* MOD_EVEX_MAP4_F8_P1 */
{
{ "enqcmds", { Gva, M }, 0 },
- { "uwrmsr", { Gq, Eq }, 0 },
+ { VEX_W_TABLE (EVEX_W_MAP4_F8_P1_M_1) },
},
/* MOD_EVEX_MAP4_F8_P3 */
{
{ "enqcmd", { Gva, M }, 0 },
- { "urdmsr", { Eq, Gq }, 0 },
+ { VEX_W_TABLE (EVEX_W_MAP4_F8_P3_M_1) },
},
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 12ab29544bb..24c0c23f23e 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -447,6 +447,14 @@
{ "pop2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
{ "pop2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
},
+ /* EVEX_W_MAP4_F8_P1_M_1 */
+ {
+ { "uwrmsr", { Gq, Eq }, 0 },
+ },
+ /* EVEX_W_MAP4_F8_P3_M_1 */
+ {
+ { "urdmsr", { Eq, Gq }, 0 },
+ },
/* EVEX_W_MAP4_FF_R_6 */
{
{ "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 3efe65af940..b9fdda1b578 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1739,6 +1739,8 @@ enum
EVEX_W_0F3A72,
EVEX_W_MAP4_8F_R_0,
+ EVEX_W_MAP4_F8_P1_M_1,
+ EVEX_W_MAP4_F8_P3_M_1,
EVEX_W_MAP4_FF_R_6,
EVEX_W_MAP5_5B_P_0,
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index fb2e9e91f05..7d248f64bbd 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3416,7 +3416,7 @@ urdmsr, 0xf20f38f8, USER_MSR, RegMem|NoSuf|NoRex64, { Reg64, Reg64 }
urdmsr, 0xf2f8, USER_MSR&APX_F, RegMem|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 }
-uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm||EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
+uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
// Immediates want to be first; md_assemble() takes care of swapping operands
// accordingly.
uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
--
2.31.1
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