[PATCH 0/3] arm: Fix encoding/disassembly of MVE vq[r]shr[u]n insns

[Alex Coplan]

This patch series fixes the encoding of vqshr[u]n insns which are
currently incorrectly encoded as the rounding vqrshr[u]n variants
(i.e. with the LSB set).

It also fixes the disassembly of both sets of insns (rounding and
non-rounding) where we currently fail to properly decode the immediate.
See patch 2/3 for a concrete of example of what goes wrong in both
cases.

The series is organised as follows:
 - 1/3 is a non-functional refactoring that should make 3/3 easier to
   review.
 - 2/3 fixes the encoding of the non-rounding vqshr[u]n insns.
 - 3/3 fixes the disassembly of the immediate for both sets of insns,
   updates an existing (incorrect) test, and adds a test for the
   non-rounding insns.

Tested as a series on arm-none-eabi, no regressions.  OK for trunk and
backports?

Thanks,
Alex

Alex Coplan (3):
  arm: Refactor condition for print_mve_shift_n
  arm: Fix encoding of MVE vqshr[u]n
  arm: Fix disassembly of MVE vq[r]shr[u]n

 gas/config/tc-arm.c                 |    8 +-
 gas/testsuite/gas/arm/mve-vqrshrn.d | 3616 +++++++++++++--------------
 gas/testsuite/gas/arm/mve-vqshrn.d  |   27 +
 gas/testsuite/gas/arm/mve-vqshrn.s  |   40 +
 opcodes/arm-dis.c                   |   39 +-
 5 files changed, 1908 insertions(+), 1822 deletions(-)
 create mode 100644 gas/testsuite/gas/arm/mve-vqshrn.d
 create mode 100644 gas/testsuite/gas/arm/mve-vqshrn.s