[PATCH 5/5][BINUTILS] aarch64: Add support for VMSA feature enhancements.

Richard Earnshaw Richard.Earnshaw@foss.arm.com
Thu Nov 16 14:16:24 GMT 2023



On 16/11/2023 11:39, Srinath Parvathaneni wrote:
> Hi,
> 
> This patch adds the permission model enhancement and memory
> attribute index enhancement features and their corresponding
> system registers in AArch64 assembler.
> Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE)
> Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE)
> Memory Attribute Index Enhancement (FEAT_AIE)
> Extension to Translation Control Registers (FEAT_TCR2)
> 
> These features are available by default from Armv9.4-A architecture.
> 
> Regression tested for aarch64-none-elf target and found
> no regressions.
> 
> Ok for binutils-master?
> 
> Regards,
> Srinath.
@@ -248,7 +260,13 @@ enum aarch64_feature_bit {
  					 | AARCH64_FEATBIT (X, SCTLR2)	\
  					 | AARCH64_FEATBIT (X, FGT2)	\
  					 | AARCH64_FEATBIT (X, PFAR)	\
-					 | AARCH64_FEATBIT (X, ATS1A))
+					 | AARCH64_FEATBIT (X, ATS1A)	\
+					 | AARCH64_FEATBIT (X, AIE)	\
+					 | AARCH64_FEATBIT (X, S1PIE)	\
+					 | AARCH64_FEATBIT (X, S2PIE)	\
+					 | AARCH64_FEATBIT (X, S1POE)	\
+					 | AARCH64_FEATBIT (X, S2POE)	\
+					 | AARCH64_FEATBIT (X, TCR2))

Hmm, it's this one where the change I suggested on patch 4 really needs 
doing so that next time we win.

Otherwise OK.

R.


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