[PATCH v2 0/8] Support Intel APX EGPR

[Cui, Lili]

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, November 6, 2023 3:30 PM
> To: Cui, Lili <lili.cui@intel.com>
> Cc: Lu, Hongjiu <hongjiu.lu@intel.com>; ccoutant@gmail.com;
> binutils@sourceware.org
> Subject: Re: [PATCH v2 0/8] Support Intel APX EGPR
> 
> On 03.11.2023 17:42, Cui, Lili wrote:
> > But if we want to merge bextr's vex and evex formats, we need to
> > support BMI&(BMI |( APX_F&x64))
> 
> Maybe more like BMI&(<tbd>|APX_F), with further work (which I was
> considering
> anyway) towards x64 becoming a prereq to the increasing number of 64-bit-
> only features? (The <tbd> may well be BMI as you suggest, even if that reads a
> little odd.
> 

Yes, most VEX instructions don't require x64, but apx_f is x64 based. If the format "BMI&(BMI |( APX_F&x64))"  is complicated to implement or looks ugly, maybe we can handle x64 uniformly for apx_f in tc-i386.c.

Lili.